Intel N2820 FH8065301616603 Hoja De Datos

Datasheet

699

The LPE core runs at a peak clock frequency of 343 MHz and has dedicated on-chip 
program and data memories and caches. The LPE core can access shared SRAM blocks, 
and external DRAM through OCP fabric. It communicates with audio peripherals using 
the audio sub-fabric, and employs Inter-Processor Communication (IPC) mechanism to 
communicate with the processor Core.

The Audio subsystem includes two OCP-based DMA engines. These DMA engines 
support single and multi-block transfers. They can be configured to transfer data 
between DRAM and audio CCMs or transfer data between CCMs and the audio 
peripheral interfaces

All these interfaces are peripherals in the Audio subsystem. LPE, LPE DMA, or the 
processor core may access the peripherals during normal operation. The PMC may 
access all peripherals during specific tasks such as at boot time or during power state 
changes.A complete audio solution based on an internal audio processing engine which 
includes several I

2

S-based output ports.

The audio core used is a dedicated audio DSP core designed specifically for audio 
processing (decoding, post-processing, mixing, etc.)

LPE requires systems with more than 512MB memory. This is required since the LPE 
firmware must reside at a stolen memory location on 512MB boundaries below 3 GiB. 
The LPE firmware itself is ~1MB, and is reserved by BIOS for LPE use.

The Audio core supports decoding of the following formats:

•

MP3

•

AAC-LC

•

HE-AAC v1/2

•

WMA9,10, PRO, Lossless, Voice

•

MPEG layer 2

•

RealAudio

•

OggVorbis

•

FLAC

•

DD/DD+