Renesas Stereo System SH7709S Manual De Usuario
Rev. 5.00, 09/03, page 79 of 760
3.5.5
Processing Flow in Event of MMU Exception (Same Processing Flow for Address
Error)
Figure 3.12 shows the MMU exception signals in the instruction fetch mode.
ID
EX
MA
WB
ID
EX
MA
WB
ID
EX
MA
WB
NOP
NOP
IF
ID
EX
MA
WB
: Exception source stage
IF
ID
EX
MA
WB
NOP
MMU exception handler
Handler transition
processing
processing
= Instruction fetch
= Instruction decode
= Instruction execution
= Memory access
= Write back
= No operation
= Instruction decode
= Instruction execution
= Memory access
= Write back
= No operation
IF
Figure 3.12 MMU Exception Signals in Instruction Fetch