Renesas Stereo System SH7709S Manual De Usuario
Rev. 5.00, 09/03, page 211 of 760
9.4
Register Descriptions
9.4.1
Frequency Control Register (FRQCR)
The frequency control register (FRQCR) is a 16-bit readable/writable register used to specify the
frequency multiplication ratio of PLL circuit 1 and the frequency division ratio of the internal
clock and the peripheral clock.
frequency multiplication ratio of PLL circuit 1 and the frequency division ratio of the internal
clock and the peripheral clock.
Only word access can be used on the FRQCR register.
FRQCR is initialized to H'0102 by a power-on reset, but retains its value in a manual reset and in
standby mode.
standby mode.
FRQCR:
Bit:
15
14
13
12
11
10
9
8
STC2
IFC2
PFC2
—
—
—
—
—
Initial value:
0
0
0
0
0
0
0
1
R/W:
R/W
R/W
R/W
R
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
—
STC1
STC0
IFC1
IFC0
PFC1
PFC0
Initial value:
0
0
0
0
0
0
1
0
R/W:
R
R
R/W
R/W
R/W
R/W
R/W
R/W
Bits 15, 5, and 4—Frequency Multiplication Ratio (STC): These bits specify the frequency
multiplication ratio of PLL circuit 1.
multiplication ratio of PLL circuit 1.
Bit 15: STC2
Bit 5: STC1
Bit 4: STC0
Description
0
0
0
×
1 (Initial
value)
0
0
1
×
2
1
0
0
×
3
0
1
0
×
4
1
0
1
×
6
Except above value
Reserved