Renesas Stereo System SH7709S Manual De Usuario

Rev. 5.00, 09/03, page 391 of 760

Table 12.1 shows the pin configuration of the TMU.

Clock input/clock output

TCLK

I/O

External clock input pin/input capture control input
pin/realtime clock (RTC) output pin

Table 12.2 shows the TMU register configuration.

*

Common

Timer output control
register

TOCR

R/W

H'00

H'FFFFFE90

8

Timer start register

TSTR

R/W

H'00

H'FFFFFE92

8

0

Timer constant register 0

TCOR0

R/W

H'FFFFFFFF

H'FFFFFE94

32

Timer counter 0

TCNT0

R/W

H'FFFFFFFF

H'FFFFFE98

32

Timer control register 0

TCR0

R/W

H'0000

H'FFFFFE9C

16

1

Timer constant register 1

TCOR1

R/W

H'FFFFFFFF

H'FFFFFEA0

32

Timer counter 1

TCNT1

R/W

H'FFFFFFFF

H'FFFFFEA4

32

Timer control register 1

TCR1

R/W

H'0000

H'FFFFFEA8

16

2

Timer constant register 2

TCOR2

R/W

H'FFFFFFFF

H'FFFFFEAC 32

Timer counter 2

TCNT2

R/W

H'FFFFFFFF

H'FFFFFEB0

32

Timer control register 2

TCR2

R/W

H'0000

H'FFFFFEB4

16

Input capture register 2

TCPR2

R

Undefined

H'FFFFFEB8

32

Note:  

* 

 Initialized by power-on resets or manual resets.