LSI 53C875A Manual De Usuario

LSI

A-2

Register Summary

Power Management Capabilities (PMC)

Power Management Control/Status (PMCSR)

Reserved

–

Reserved

–

Revision ID (Rev ID)

Subsystem Vendor ID

Table A.2

LSI53C875A SCSI Register Map

Register Name

Address

Read/Write

Page

Adder Sum Output (ADDER)

Chip Control 0 (CCNTL0)

Chip Control 1 (CCNTL1)

Chip Test Five (CTEST5)

Chip Test Four (CTEST4)

Chip Test One (CTEST1)

Chip Test Six (CTEST6)

Chip Test Three (CTEST3)

Chip Test Two (CTEST2)

Read Only (bit 3 write) 4-54

Chip Test Zero (CTEST0)

Cumulative SCSI Byte Count (CSBC)

Data Structure Address (DSA)

DMA Byte Counter (DBC)

Table A.1

LSI53C875A PCI Register Map (Cont.)

Register Name

Address

Read/Write

Page