LSI 53C875A Manual De Usuario
PCI Functional Description
2-13
2.1.3.5 Examples:
MR = Memory Read, MRL = Memory Read Line, MRM = Memory Read
Multiple, MW = Memory Write, MWI = Memory Write and Invalidate.
Multiple, MW = Memory Write, MWI = Memory Write and Invalidate.
Read Example 1 –
Burst = 4 Dwords, Cache Line Size = 4 Dwords:
Read Example 2 –
Burst = 8 Dwords, Cache Line Size = 4 Dwords:
A to B:
MRL (6 bytes)
A to C:
MRL (13 bytes)
A to D:
MRL (15 bytes)
MR (2 bytes)
MR (2 bytes)
C to D:
MRM (5 bytes)
C to E:
MRM (15 bytes)
MRM (6 bytes)
MRM (6 bytes)
D to F:
MRL (15 bytes)
MRL (16 bytes)
MR (1 byte)
MRL (16 bytes)
MR (1 byte)
A to H:
MRL (15 bytes)
MRL (16 bytes)
MRL (16 bytes)
MRL (16 bytes)
MRL (16 bytes)
MR (2 bytes)
MRL (16 bytes)
MRL (16 bytes)
MRL (16 bytes)
MRL (16 bytes)
MR (2 bytes)
A to G:
MRL (15 bytes)
MRL (16 bytes)
MRL (16 bytes)
MRL (16 bytes)
MR (3 bytes)
MRL (16 bytes)
MRL (16 bytes)
MRL (16 bytes)
MR (3 bytes)
A to B:
MRL (6 bytes)
A to C:
MRL (13 bytes)
A to D:
MRM (17 bytes)
C to D:
MRM (5 bytes)