Cypress EZ-OTG CY7C67200 Manual De Usuario
CY7C67200
Document #: 38-08014 Rev. *G
Page 40 of 78
VBUS Valid Flag (Bit 0)
The VBUS Valid Flag bit indicates whether OTG VBus is
greater than 4.4V. After turning on VBUS, firmware should wait
at least 10 µs before this reading this bit.
greater than 4.4V. After turning on VBUS, firmware should wait
at least 10 µs before this reading this bit.
1: OTG VBus is greater then 4.4V
0: OTG VBus is less then 4.4V
Reserved
All reserved bits must be written as ‘0’.
GPIO Registers
There are seven registers dedicated for GPIO operations. These seven registers are covered in this section and summarized in
.
GPIO Control Register [0xC006] [R/W]
Figure 41. GPIO Control Register
Register Description
The GPIO Control register configures the GPIO pins for
various interface options. It also controls the polarity of the
GPIO interrupt on IRQ0 (GPIO24).
various interface options. It also controls the polarity of the
GPIO interrupt on IRQ0 (GPIO24).
Write Protect Enable (Bit 15)
The Write Protect Enable bit enables or disables the GPIO
write protect. When Write Protect is enabled, the GPIO Mode
Select [15:8] bits are read-only until a chip reset.
write protect. When Write Protect is enabled, the GPIO Mode
Select [15:8] bits are read-only until a chip reset.
1: Enable Write Protect
0: Disable Write Protect
SAS Enable (Bit 11)
The SAS Enable bit, when in SPI mode, reroutes the SPI port
SPI_nSSI pin to GPIO[15] rather then GPIO[9].
SPI_nSSI pin to GPIO[15] rather then GPIO[9].
1: Reroute SPI_nss to GPIO[15]
0: Leave SPI_nss on GPIO[9]
Mode Select (Bits [10:8])
.
Table 29.GPIO Registers
Register Name
Address
R/W
GPIO Control Register
0xC006
R/W
GPIO0 Output Data Register
0xC01E
R/W
GPIO0 Input Data Register
0xC020
R
GPIO0 Direction Register
0xC022
R/W
GPIO1 Output Data Register
0xC024
R/W
GPIO1 Input Data Register
0xC026
R
GPIO1 Direction Register
0xC028
R/W
Bit #
15
14
13
12
11
10
9
8
Field
Write Protect
Enable
Reserved
Reserved
SAS
Enable
Mode
Select
Read/Write
R/W
-
R
-
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
HSS
Enable
Reserved
SPI
Enable
Reserved
Interrupt 0
Polarity Select
Interrupt 0
Enable
Read/Write
R/W
-
R/W
-
-
-
R/W
R/W
Default
0
0
0
0
0
0
0
0
Table 30.Mode Select Definition
Mode Select
[10:8]
GPIO Configuration
111
Reserved
110
SCAN – (HW) Scan diagnostic. For produc-
tion test only. Not for normal operation
tion test only. Not for normal operation
101
HPI – Host Port Interface
100
Reserved
011
Reserved
010
Reserved
001
Reserved
000
GPIO – General Purpose Input Output