Cypress CY7C67300 Manual De Usuario
CY7C67300
Document #: 38-08015 Rev. *J
Page 79 of 99
Pin Diagram
Pin Descriptions
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
G
P
IO
24
/IN
T/IORDY
24
/IN
T/IORDY
/IR
Q
0
GN
D
A1
0
0
XTAL
O
U
T
XTAL
IN
A1
1
1
A1
2
2
A1
3
3
A1
4
4
nX
MEMS
MEMS
EL
nX
ROMS
ROMS
EL
n
X
R
A
M
SEL
VC
C
C
A1
5/C
5/C
L
KSE
L
GP
IO31
/S
C
C
L
GP
IO
3
0
/S
D
D
A
G
P
IO2
9
/O
TGID
GP
IO
2
8
/T
X
GP
IO
2
7
/R
X
X
GP
IO
2
2
6
/CTS/
P
WM3
GP
IO
2
2
5
/I
R
Q
1
G
P
IO
23
/nR
23
/nR
D
/IOR
G
P
IO
22
/nW
22
/nW
R
/IOW
G
P
IO
21
/nC
21
/nC
S
G
P
IO
20
/A1
20
/A1
/CS1
A9
A8
DP1A
DM1A
AVCC
A7
DP1B
DM1B
A6
BOOSTVCC
BOOSTGND
VSWITCH
CSWITCHA
CSWITCHB
OTGVBUS
DP2A
DM2A
A5
A4
AGND
DP2B
DM2B
A3
A2
A1
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
GND
nB
EL
/A0
EL
/A0
nB
E
E
H
A1
6
6
A1
7
7
A1
8
8
GPI
O
0/
D
0
GP
IO
1
1
/D1
GPI
O
2/
D
2
GP
IO
3/
D
3
GP
IO
4
4
/D4
GP
IO
5/
D
5
VC
C
C
GP
IO6
/D6
GP
IO7
/D7
n
R
ESE
T
Re
se
rv
se
rv
ed
D0
D1
D2
D4
D5
D6
D7
D3
GND
GPIO19/A0/CS0
GPIO18/A2/RTS/PWM2
GPIO17/A1/RXD/PWM1
GPIO16/A0/TXD/PWM0
GPIO15/D15/nSSI
GPIO14/D14
GPIO13/D13
GPIO12/D12
GPIO11/D11/MOSI
GPIO10/D10/SCK
nRD
VCC
nWR
GPIO9/D9/nSSI
GPIO8/D8/MISO
D15/CTS
D14/RTS
D13/RXD
D12/TXD
D11/MOSI
D10/SCK
D9/nSSI
D8/MISO
GND
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
51
CY7C67300
Figure 11. EZ-Host Pin Diagram
Table 131. Pin Descriptions
Pin
Name
Type
Description
67
D15/CTS
IO
D15:
External Memory Data Bus
CTS:
HSS CTS
68
D14/RTS
IO
D14:
External Memory Data Bus
RTS:
HSS RTS
69
D13/RXD
IO
D13:
External Memory Data Bus
RXD:
HSS RXD (Data is received on this pin)
70
D12/TXD
IO
D12:
External Memory Data Bus
TXD:
HSS TXD (Data is transmitted from this pin)