Intel 8XC196MH Manual De Usuario
8XC196MC, MD, MH USER’S MANUAL
A-8
ADDCB
ADD BYTES WITH CARRY. Adds the source
and destination byte operands and the carry
flag (0 or 1) and stores the sum into the
destination operand.
and destination byte operands and the carry
flag (0 or 1) and stores the sum into the
destination operand.
(DEST)
←
(DEST) + (SRC) + C
DEST, SRC
ADDCB breg, baop
(101101aa) (baop) (breg)
PSW Flag Settings
Z
N
C
V
VT
ST
↓
✓
✓
✓
↑
—
AND
(2 operands)
(2 operands)
LOGICAL AND WORDS. ANDs the source
and destination word operands and stores
the result into the destination operand. The
result has ones in only the bit positions in
which both operands had a “1” and zeros in
all other bit positions.
and destination word operands and stores
the result into the destination operand. The
result has ones in only the bit positions in
which both operands had a “1” and zeros in
all other bit positions.
(DEST)
←
(DEST) AND (SRC)
DEST, SRC
AND
wreg, waop
(011000aa) (waop) (wreg)
PSW Flag Settings
Z
N
C
V
VT
ST
✓
✓
0
0
—
—
AND
(3 operands)
(3 operands)
LOGICAL AND WORDS. ANDs the two
source word operands and stores the result
into the destination operand. The result has
ones in only the bit positions in which both
operands had a “1” and zeros in all other bit
positions.
source word operands and stores the result
into the destination operand. The result has
ones in only the bit positions in which both
operands had a “1” and zeros in all other bit
positions.
(DEST)
←
(SRC1) AND (SRC2)
DEST, SRC1, SRC2
AND Dwreg,
Swreg,
waop
(010000aa) (waop) (Swreg) (Dwreg)
PSW Flag Settings
Z
N
C
V
VT
ST
✓
✓
0
0
—
—
ANDB
(2 operands)
(2 operands)
LOGICAL AND BYTES. ANDs the source
and destination byte operands and stores the
result into the destination operand. The result
has ones in only the bit positions in which
both operands had a “1” and zeros in all other
bit positions.
and destination byte operands and stores the
result into the destination operand. The result
has ones in only the bit positions in which
both operands had a “1” and zeros in all other
bit positions.
(DEST)
←
(DEST) AND (SRC)
DEST, SRC
ANDB
breg, baop
(011100aa) (baop) (breg)
PSW Flag Settings
Z
N
C
V
VT
ST
✓
✓
0
0
—
—
Table A-6. Instruction Set (Continued)
Mnemonic
Operation
Instruction Format