Cypress CY7C1177V18 Manuales de usuario

Tabla de contenidos

• Features

  1
• Configurations

  1
• Functional Description

  1
• Selection Guide

  1
• Logic Block Diagram (CY7C1166V18)

  2
• Logic Block Diagram (CY7C1177V18)

  2
• Logic Block Diagram (CY7C1168V18)

  3
• Logic Block Diagram (CY7C1170V18)

  3
• Pin Configurations

  4
• Pin Definitions

  6
• Functional Overview

  8
  • Read Operations

    8
  • Write Operations

    8
  • Byte Write Operations

    8
  • Double Data Rate Operation

    8
  • Depth Expansion

    8
  • Programmable Impedance

    8
  • Echo Clocks

    8
  • Valid Data Indicator (QVLD)

    8
  • DLL

    9
• Truth Table

  9
• Write Cycle Descriptions

  10
• IEEE 1149.1 Serial Boundary Scan (JTAG)

  12
  • Disabling the JTAG Feature

    12
  • Test Access Port-Test Clock

    12
  • Test Mode Select

    12
  • Test Data-In (TDI)

    12
  • Test Data-Out (TDO)

    12
  • Performing a TAP Reset

    12
  • TAP Registers

    12
    • Instruction Register

      12
    • Bypass Register

      12
    • Boundary Scan Register

      12
    • Identification (ID) Register

      12
    • TAP Instruction Set

      12
    • IDCODE

      13
    • SAMPLE Z

      13
    • SAMPLE/PRELOAD

      13
    • BYPASS

      13
    • EXTEST

      13
    • EXTEST Output Bus Tri-State

      13
    • Reserved

      13
• TAP Controller State Diagram

  14
• TAP Controller Block Diagram

  15
• TAP Electrical Characteristics

  15
• TAP AC Switching Characteristics

  16
• TAP Timing and Test Condition

  16
• Identification Register Definitions

  17
• Scan Register Sizes

  17
• Instruction Codes

  17
• Boundary Scan Order

  18
• Power Up Sequence in DDR-II+ SRAM

  19
• Power Up Sequence

  19
• DLL Constraints

  19
• Power Up Waveforms

  19
• Maximum Ratings

  20
• Operating Range

  20
• Electrical Characteristic

  20
• AC Input Requirements

  20
• Capacitance

  21
• Thermal Resistance

  21
• AC Test Loads and Waveforms

  21
• Switching Waveform

  23
• Ordering Information

  24
• Package Diagram

  26
• Document History Page

  27