Intel 4 3.20 GHz Manuales de usuario

Tabla de contenidos

• Title Page

  1
• Contents

  3
• Revision History

  7
• Introduction 1

  9
  • 1.1 Terminology

    11
    • 1.1.1 Processor Packaging Terminology

      11
  • 1.2 References

    12
• Electrical Specifications 2

  15
  • 2.1 System Bus and GTLREF

    15
  • 2.2 Power and Ground Pins

    15
  • 2.3 Decoupling Guidelines

    16
    • 2.3.1 VCC Decoupling

      16
    • 2.3.2 System Bus AGTL+ Decoupling

      16
  • 2.4 Voltage Identification

    16
    • 2.4.1 Phase Lock Loop (PLL) Power and Filter

      18
  • 2.5 Reserved, Unused Pins, and TESTHI[12:0]

    20
  • 2.6 System Bus Signal Groups

    21
  • 2.7 Asynchronous GTL+ Signals

    22
  • 2.8 Test Access Port (TAP) Connection

    22
  • 2.9 System Bus Frequency Select Signals (BSEL[1:0])

    22
  • 2.10 Maximum Ratings

    23
  • 2.11 Processor DC Specifications

    23
  • 2.12 AGTL+ System Bus Specifications

    35
• Package Mechanical Specifications 3

  37
  • 3.1 Package Load Specifications

    40
  • 3.2 Processor Insertion Specifications

    41
  • 3.3 Processor Mass Specifications

    41
  • 3.4 Processor Materials

    41
  • 3.5 Processor Markings

    42
• Pin Lists and Signal Descriptions 4

  45
  • 4.1 Processor Pin Assignments

    45
  • 4.2 Signal Descriptions

    58
• Thermal Specifications and Design Considerations 5

  67
  • 5.1 Processor Thermal Specifications

    68
    • 5.1.1 Thermal Specifications

      68
    • 5.1.2 Thermal Metrology

      70
      • 5.1.2.1 Processor Case Temperature Measurement

        70
• Features 6

  71
  • 6.1 Power-On Configuration Options

    71
  • 6.2 Clock Control and Low Power States

    71
    • 6.2.1 Normal State—State 1

      71
    • 6.2.2 AutoHALT Powerdown State—State 2

      72
    • 6.2.3 Stop-Grant State—State 3

      73
    • 6.2.4 HALT/Grant Snoop State—State 4

      73
    • 6.2.5 Sleep State—State 5

      74
  • 6.3 Thermal Monitor

    74
    • 6.3.1 Thermal Diode

      76
• Boxed Processor Specifications 7

  77
  • 7.1 Introduction

    77
  • 7.2 Mechanical Specifications

    78
    • 7.2.1 Boxed Processor Cooling Solution Dimensions

      78
    • 7.2.2 Boxed Processor Fan Heatsink Weight

      79
    • 7.2.3 Boxed Processor Retention Mechanism and Heatsink Assembly

      79
  • 7.3 Electrical Requirements

    80
    • 7.3.1 Fan Heatsink Power Supply

      80
  • 7.4 Thermal Specifications

    82
    • 7.4.1 Boxed Processor Cooling Requirements

      82
    • 7.4.2 Variable Speed Fan

      83
• Debug Tools Specifications 8

  85
  • 8.1 Logic Analyzer Interface (LAI)

    85
    • 8.1.1 Mechanical Considerations

      85
    • 8.1.2 Electrical Considerations

      85