Manual De Usuario (BX80557E1200)Tabla de contenidosContents3Revision History7Introduction 191.1 Terminology91.1.1 Processor Packaging Terminology101.2 References11Electrical Specifications 2132.1 System Bus and GTLREF132.2 Power and Ground Pins132.3 Decoupling Guidelines132.3.1 VCC Decoupling142.3.2 System Bus AGTL+ Decoupling142.3.3 System Bus Clock (BCLK[1:0]) and Processor Clocking142.4 Voltage Identification152.4.1 Phase Lock Loop (PLL) Power and Filter162.5 Reserved, Unused Pins, and TESTHI[12:0]182.6 System Bus Signal Groups192.7 Asynchronous GTL+ Signals202.8 Test Access Port (TAP) Connection202.9 System Bus Frequency Select Signals (BSEL[1:0])202.10 Maximum Ratings212.11 Processor DC Specifications212.11.1 Flexible Motherboard Guidelines (FMB)212.12 AGTL+ System Bus Specifications282.13 System Bus AC Specifications292.14 Processor AC Timing Waveforms32System Bus Signal Quality Specifications 3413.1 System Bus Clock (BCLK) Signal Quality Specifications413.2 System Bus Signal Quality Specifications and Measurement Guidelines423.3 System Bus Signal Quality Specifications and Measurement Guidelines453.3.1 Overshoot/Undershoot Guidelines453.3.2 Overshoot/Undershoot Magnitude453.3.3 Overshoot/Undershoot Pulse Duration453.3.4 Activity Factor463.3.5 Reading Overshoot/Undershoot Specification Tables463.3.6 Conformance Determination to Overshoot/Undershoot Specifications47Package Mechanical Specifications 4514.1 Package Load Specifications544.2 Processor Insertion Specifications554.3 Processor Mass Specifications554.4 Processor Materials554.5 Processor Markings55Pin Listing and Signal Definitions 5595.1 Processor Pin Assignments595.2 Alphabetical Signals Reference72Thermal Specifications and Design Considerations 6816.1 Processor Thermal Specifications826.1.1 Thermal Specifications826.1.2 Thermal Metrology836.1.2.1 Processor Case Temperature Measurement83Features 7857.1 Power-On Configuration Options857.2 Clock Control and Low Power States857.2.1 Normal State—State 1857.2.2 AutoHALT Powerdown State—State 2867.2.3 Stop-Grant State—State 3877.2.4 HALT/Grant Snoop State—State 4877.2.5 Sleep State—State 5887.3 Thermal Monitor887.3.1 Thermal Diode90Boxed Processor Specifications 8918.1 Introduction918.2 Mechanical Specifications928.2.1 Boxed Processor Cooling Solution Dimensions928.2.2 Boxed Processor Fan Heatsink Weight938.2.3 Boxed Processor Retention Mechanism and Heatsink Assembly938.3 Electrical Requirements948.3.1 Fan Heatsink Power Supply948.4 Thermal Specifications978.4.1 Boxed Processor Cooling Requirements978.4.2 Variable Speed Fan98Debug Tools Specifications 91019.1 Logic Analyzer Interface (LAI)1019.1.1 Mechanical Considerations1019.1.2 Electrical Considerations101Tamaño: 4 MBPáginas: 102Language: EnglishManuales abiertas
Hoja De Datos (HH80557PG025D)Tabla de contenidosContents3Figures5Tables6Intel® Celeron® Dual-Core Processor E1000D Series7Revision History8Intel® Celeron® Dual-Core Processor E1000D Series11 Introduction91.1 Terminology91.1.1 Processor Terminology101.2 References112 Electrical Specifications132.1 Power and Ground Lands132.2 Decoupling Guidelines132.2.1 VCC Decoupling132.2.2 Vtt Decoupling132.2.3 FSB Decoupling142.3 Voltage Identification142.4 Market Segment Identification (MSID)162.5 Reserved, Unused, and TESTHI Signals162.6 Voltage and Current Specification172.6.1 Absolute Maximum and Minimum Ratings172.6.2 DC Voltage and Current Specification192.6.3 Vcc Overshoot212.6.4 Die Voltage Validation222.7 Signaling Specifications222.7.1 FSB Signal Groups232.7.2 CMOS and Open Drain Signals242.7.3 Processor DC Specifications252.7.3.1 GTL+ Front Side Bus Specifications262.8 Clock Specifications282.8.1 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking282.8.2 FSB Frequency Select Signals (BSEL[2:0])282.8.3 Phase Lock Loop (PLL) and Filter292.8.4 BCLK[1:0] Specifications (CK505 based Platforms)292.8.5 BCLK[1:0] Specifications (CK410 based Platforms)312.9 PECI DC Specifications323 Package Mechanical Specifications333.1 Package Mechanical Drawing333.2 Processor Component Keep-Out Zones373.3 Package Loading Specifications373.4 Package Handling Guidelines373.5 Package Insertion Specifications383.6 Processor Mass Specification383.7 Processor Materials383.8 Processor Markings383.9 Processor Land Coordinates394 Land Listing and Signal Descriptions414.1 Processor Land Assignments414.2 Alphabetical Signals Reference645 Thermal Specifications and Design Considerations735.1 Processor Thermal Specifications735.1.1 Thermal Specifications735.1.2 Thermal Metrology765.2 Processor Thermal Features765.2.1 Thermal Monitor765.2.2 Thermal Monitor 2775.2.3 On-Demand Mode785.2.4 PROCHOT# Signal795.2.5 THERMTRIP# Signal795.3 Thermal Diode805.4 Platform Environment Control Interface (PECI)825.4.1 Introduction825.4.1.1 Key Difference with Legacy Diode-Based Thermal Management825.4.2 PECI Specifications845.4.2.1 PECI Device Address845.4.2.2 PECI Command Support845.4.2.3 PECI Fault Handling Requirements845.4.2.4 PECI GetTemp0() Error Code Support846 Features856.1 Power-On Configuration Options856.2 Clock Control and Low Power States866.2.1 Normal State866.2.2 HALT and Extended HALT Powerdown States866.2.2.1 HALT Powerdown State876.2.2.2 Extended HALT Powerdown State876.2.3 Stop Grant and Extended Stop Grant States876.2.3.1 Stop-Grant State886.2.3.2 Extended Stop Grant State886.2.4 Extended HALT Snoop State, HALT Snoop State, Extended Stop Grant Snoop State, and Stop Grant Snoop State886.2.4.1 HALT Snoop State, Stop Grant Snoop State886.2.4.2 Extended HALT Snoop State, Extended Stop Grant Snoop State896.3 Enhanced Intel SpeedStep® Technology897 Boxed Processor Specifications917.1 Mechanical Specifications927.1.1 Boxed Processor Cooling Solution Dimensions927.1.2 Boxed Processor Fan Heatsink Weight947.1.3 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly947.2 Electrical Requirements947.2.1 Fan Heatsink Power Supply947.3 Thermal Specifications967.3.1 Boxed Processor Cooling Requirements967.3.2 Fan Speed Control Operation988 Debug Tools Specifications1018.1 Logic Analyzer Interface (LAI)1018.1.1 Mechanical Considerations1018.1.2 Electrical Considerations101Tamaño: 1 MBPáginas: 102Language: EnglishManuales abiertas
