Texas Instruments IC MCU 16B MSP430F167IPM LQFP-64 TID Manuales de usuario

Tabla de contenidos

• features

  1
• description

  1
• AVAILABLE OPTIONS

  2
• DEVELOPMENT TOOL SUPPORT

  2
• pin designation, MSP430F155, MSP430F156, and MSP430F157

  3
• pin designation, MSP430F167, MSP430F168, MSP430F169

  4
• pin designation, MSP430F1610, MSP430F1611, MSP430F1612

  5
• functional block diagram, MSP430F15x

  6
• functional block diagram, MSP430F16x

  6
• functional block diagram, MSP430F161x

  7
• Terminal Functions

  8
• short-form description

  10
  • CPU

    10
  • instruction set

    10
  • operating modes

    11
  • interrupt vector addresses

    12
  • special function registers

    13
    • interrupt enable 1 and 2

      13
    • interrupt flag register 1 and 2

      13
    • module enable registers 1 and 2

      14
  • memory organization, MSP430F15x

    15
  • memory organization, MSP430F16x

    15
  • memory organization, MSP430F161x

    15
  • bootstrap loader (BSL)

    16
  • flash memory

    16
  • peripherals

    17
    • DMA controller

      17
    • oscillator and system clock

      17
    • brownout, supply voltage supervisor (SVS)

      17
    • digital I/O

      17
    • watchdog timer

      17
    • hardware multiplier (MSP430F16x/161x only)

      17
    • USART0

      18
    • USART1 (MSP430F16x/161x only)

      18
    • Timer_A3

      18
    • Timer_B3 (MSP430F15x only)

      18
    • Timer_B7 (MSP430F16x/161x only)

      19
    • Comparator_A

      20
    • ADC12

      20
    • DAC12

      20
    • peripheral file map

      21
• absolute maximum ratings over operating free-air temperature (unless otherwise noted)

  25
• recommended operating conditions

  25
• electrical characteristics over recommended operating free-air temperature (unless otherwise noted)

  26
  • MSP430F15x/16x supply current into AVCC + DVCC excluding external current (AVCC = DVCC = VCC)

    26
  • MSP430F161x supply current into AVCC + DVCC excluding external current (AVCC = DVCC = VCC)

    27
  • Schmitt-trigger inputs - ports P1, P2, P3, P4, P5, P6, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI)

    28
  • inputs Px.x, TAx, TBx

    28
  • leakage current - ports P1, P2, P3, P4, P5, P6

    28
  • outputs - ports P1, P2, P3, P4, P5, P6

    29
  • output frequency

    29
  • wake-up LPM3

    31
  • RAM

    31
  • Comparator_A

    31
  • POR/brownout reset (BOR)

    33
  • SVS (supply voltage supervisor/monitor)

    35
  • DCO

    37
  • main DCO characteristics

    38
  • DCO when using ROSC

    38
  • crystal oscillator, LFXT1 oscillator

    38
  • crystal oscillator, XT2 oscillator

    38
  • USART0, USART1

    38
  • 12-bit ADC, power supply and input range conditions

    39
  • 12-bit ADC, external reference

    39
  • 12-bit ADC, built-in reference

    40
  • 12-bit ADC, timing parameters

    42
  • 12-bit ADC, linearity parameters

    42
  • 12-bit ADC, temperature sensor and built-in VMID

    43
  • 12-bit DAC, supply specifications

    43
  • 12-bit DAC, linearity specifications

    44
  • 12-bit DAC, output specifications

    46
  • 12-bit DAC, reference input specifications

    47
  • 12-bit DAC, dynamic specifications; Vref = VCC, DAC12IR = 1

    47
  • flash memory

    49
  • JTAG interface

    49
  • JTAG fuse

    49
• APPLICATION INFORMATION

  50
  • input/output schematics

    50
    • port P1, P1.0 to P1.7, input/output with Schmitt trigger

      50
    • port P2, P2.0 to P2.2, P2.6, and P2.7 input/output with Schmitt trigger

      51
    • port P2, P2.3 to P2.4, input/output with Schmitt trigger

      52
    • port P2, P2.5, input/output with Schmitt trigger and Rosc function for the basic clock module

      53
    • port P3, P3.0 and P3.4 to P3.7, input/output with Schmitt trigger

      54
    • port P3, P3.1, input/output with Schmitt trigger

      55
    • port P3, P3.2, input/output with Schmitt trigger

      56
    • port P3, P3.3, input/output with Schmitt-trigger

      56
    • port P4, P4.0 to P4.6, input/output with Schmitt trigger

      57
    • port P4, P4.7, input/output with Schmitt trigger

      58
    • port P5, P5.0 and P5.4 to P5.7, input/output with Schmitt trigger

      58
    • port P5, P5.1, input/output with Schmitt trigger

      59
    • port P5, P5.2, input/output with Schmitt trigger

      59
    • port P5, P5.3, input/output with Schmitt trigger

      60
    • port P6, P6.0 to P6.5, input/output with Schmitt trigger

      61
    • port P6, P6.6, input/output with Schmitt trigger

      62
    • port P6, P6.7, input/output with Schmitt trigger

      63
    • JTAG pins TMS, TCK, TDI/TCLK, TDO/TDI, input/output with Schmitt trigger

      64
  • JTAG fuse check mode

    65
• Data Sheet Revision History

  66