Epson S1D13708 Manuel D’Utilisation
Epson Research and Development
Page 23
Vancouver Design Center
Hardware Functional Specification
S1D13708
Issue Date: 02/03/07
X39A-A-001-02
.
Figure 3-6 Typical System Diagram (MC68K #2, Motorola 32-Bit 68030)
S1D13708
FPSHIFT
FPFRAME
DRDY
GPIO0
FPDAT[17:0]
XSCL
DY
GCP
XINH
D[17:0]
18-bit
MC68K #2
BUS
BUS
RESET#
SIZ0
D[31:16]
AS#
R/W#
SIZ1
DSACK1#
A[16:0]
CLK
WE0#
RD/WR#
AB[16:0]
DB[15:0]
WE1#
BS#
RD#
M/R#
CS#
CLKI
WAIT#
RESET#
A[31:17]
FC0, FC1
Decoder
Decoder
DS#
GPO0
CL
KI2
Oscillator
D-TFD
XSET (
B
ia
s
P
o
we
r)
Display
FPLINE
LP
GPIO1
YSCL
GPIO2
FR
GPIO3
FRS
GPIO4
RES
GPIO5
DD_P1
GPIO6
YSCLD