Epson S1D13708 Manuel D’Utilisation

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Epson Research and Development
Vancouver Design Center
S1D13708
Connecting to the Sharp HR-TFT Panels
X39A-G-011-01
Issue Date: 01/11/25
2.3  S1D13708 to LQ039Q2DS01 Pin Mapping
Table 2-2: S1D13708 to LQ039Q2DS01 Pin Mapping
LCD Pin 
No.
LCD Pin 
Name
S1D13708 
Pin Name
Description
Remarks
1
VDD
-
Power supply of gate driver (high level)
2
VCC
-
Power supply of gate driver (logic high)
3
MOD
-
Control signal of gate driver
4
MOD
-
Control signal of gate driver
5
U/L
-
Selection for vertical scanning direction
Connect to VSHD (top / bottom scanning)
6
SPS
FPFRAME
Start signal of gate driver
7
CLS
GPIO1
Clock signal of gate driver
8
VSS
-
Power supply of gate driver (logic low)
9
VEE
-
Power supply of gate driver (low level)
10
VEE
-
Power supply of gate driver (low level)
11
VCOM
-
Common electrode driving signal
12
VCOM
-
Common electrode driving signal
13
SPL
GPIO3
Sampling start signal for left / right scanning
14
R0
FPDAT11
Red data signal (LSB)
15
R1
FPDAT10
Red data signal
16
R2
FPDAT9
Red data signal
17
R3
FPDAT2
Red data signal
18
R4
FPDAT1
Red data signal
19
R5
FPDAT0
Red data signal (MSB)
20
G0
FPDAT14
Green data signal (LSB)
21
G1
FPDAT13
Green data signal
22
G2
FPDAT12
Green data signal
23
G3
FPDAT5
Green data signal
24
G4
FPDAT4
Green data signal
25
G5
FPDAT3
Green data signal (MSB)