Nvidia DG-04927-001_V01 Manuel D’Utilisation

Page de 41
Tegra 200 Series Developer Board User Guide
 
DG-04927-001_v01
 
Advance Information – Subject to Change 
16
 
 
NVIDIA CONFIDENTIAL
 
4.1.1  Major Components 
4.1.1.1  PMU 
The Tegra 200 Series Developer Board includes a multi-channel power management unit for embedded processors (TI 
TPS658621). 
Feature List 
ƒ
 
Host Interface 
I2C Control I/F 
Core/CPU power request signals 
32.768KHz Clock 
Reset input 
Reset output 
ƒ
 
RTC LDO 
1.0V-1.2V nominal voltage range with 25mV steps 
Separate LDO for RTC domain allowing Deep Sleep mode support – the Tegra 250 lowest power mode 
Switch RTC domain automatically back to 1.2V when wake-up event detected (w/CORE_PWR_REQ)  
ƒ
 
CORE switcher 
1.0V-1.2V nominal voltage range with 25mV steps 
CORE and RTC domains must track each other within 170mV 
Tracking can be ensured in software 
Optimized DVS handled by NVIDIA BSP (DVFS architecture) 
Turned off if CORE_PWR_REQ is de-asserted – on at 1.2V when CORE_PWR_REQ asserted 
ƒ
 
CPU switcher 
0.85-1.0V nominal voltage range with 25mV steps 
Optimized DVS handled by NVIDIA BSP (DVFS architecture) 
Turned off if CPU_PWR_REQ is de-asserted – on at 1.0V when CPU_PWR_REQ asserted 
ƒ
 
PLL LDO 
Use 1.1V LDO 
Very good line regulation ensured using DC/DC switcher as LDO source 
ƒ
 
STDBY input 
Standby mode:  Only the minimum rails are kept powered (RTC and SYSTEM domains, DDR2 in self-refresh)  
The Tegra 250 indicates Standby mode by de-asserting CORE_PWR_REQ (polarity programmable) 
4.1.1.2  Battery Charge Controller 
The Tegra 200 Series Developer Board includes a battery charger with input current detect comparator and charge enable pin 
(TI bq24745). For a detailed description and list of device features, see 
4.1.1.3  Battery Pack (Not Included) 
The Tegra 200 Series Developer Board can be used with a 3 cell (3S1P) Lithium ion battery pack that has a nominal voltage of 
10.8 volts and a total capacity of 2200mAh. The 3S1P is ideal for applications that can operate on lower voltages. 
4.1.1.4  External Switchers, LDOs, Power Switches 
The Tegra 200 Series Developer Board includes the following components: 
ƒ
 
Notebook System Power Controller (TI TPS51220): a dual synchronous buck regulator controller with 2 LDOs. For a 
detailed description and list of device features, see 
ƒ
 
DDR2 Memory Power Supply (TI TPS51116): provides a power supply for the DDR2memory system. For a detailed 
description and list of device features, see 
ƒ
 
350mA Low-Dropout Linear Regulator (TI TPS72012): for a detailed description and list of device features, see 
ƒ
 
Step Down Converter (TI TPS62290): synchronous step down dc-dc converter optimized for battery powered portable 
devices. For a detailed description and list of device features, see 
ƒ
 
135-mΩ Dual Power-Distribution Switch (TI TPS2052): for a detailed description and list of device features, see 
ƒ
 
135-mΩ Power Distribution Switch (TI TPS2051): for a detailed description and list of device features, see