Fujitsu D1241 Manuel D’Utilisation
User’s Manual
50
4. BIOS SETUP
4. BIOS SETUP
4.4.1 Chip Configuration
Chip Configuration
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache technol-
ogy for the video memory of the processor. It can greatly improve the dis-
play speed by caching the display data. You must set this to UC (uncacheable)
if your display card cannot support this feature; otherwise your system may
not boot. Configuration options: [UC] [USWC]
ogy for the video memory of the processor. It can greatly improve the dis-
play speed by caching the display data. You must set this to UC (uncacheable)
if your display card cannot support this feature; otherwise your system may
not boot. Configuration options: [UC] [USWC]
Memory Hole At 15M-16M [Disabled]
This field allows you to reserve an address space for ISA devices that re-
quire it. Configuration options: [Disabled] [Enabled]
quire it. Configuration options: [Disabled] [Enabled]
High Priority PCI Mode [Enabled]
This field allows you to give PCI slot 1 a higher priority. You may want to
leave on the default setting if you are using an IEEE-1394 PCI card. Con-
figuration options: [Disabled] [Enabled]
leave on the default setting if you are using an IEEE-1394 PCI card. Con-
figuration options: [Disabled] [Enabled]
Onboard PCI IDE Enable [Both]
You can select to enable the primary IDE channel, secondary IDE channel,
both, or disable both channels. Configuration options: [Both] [Disabled]
both, or disable both channels. Configuration options: [Both] [Disabled]