Fujitsu FR81S Manuel D’Utilisation

CHAPTER 20: RELOAD TIMER 

 

 

5. Operation 
 

FUJITSU SEMICONDUCTOR LIMITED 

CHAPTER : RELOAD TIMER 
FUJITSU SEMICONDUCTOR CONFIDENTIAL 

38 

Figure 5-10 Dual One-shot Operation 

 

TMRLRA

TMRLRB

TMRLRB

count

TMRLRB + 1

TMRLRA + 1

TMRLRA + 1

TMRLRB + 1

TMRLRB + 1

TMRLRA + 1

Waiting for

activation trigger

Waiting for

activation trigger

Waiting for

activation trigger

Waiting for

activation trigger

TMRLRB + 1

TMRLRA

TMRLRB

A

-1

0

B

-1

-1

-1 -1

0

A

-1

0

-1

-1

B

0xFFFF

A:TMRLRA
B:TMRLRB

UF-A

UF-B

UF-A

TMRLRA

TMRLRA

TMRLRB

A -1           0 B

-1

-1

-1 -1

0

A  -1

0

-1

B

0xFFFF

A:TMRLRA
B:TMRLRB

UF-A

UF-B

UF-A

TOUT

(OUTL=0)

Dual one-shot operation (gate input)

Dual one-shot operation

( When the trigger input and rising edge trigger are selected)

Count clock

Underflow

UF bit

CNTE(register)

Count clock

Underflow

UF bit

CNTE(register)

TRG(register)

TTRG(pin)

TTRG(pin)

TTRG pin

effective edge

Timer reloaded

register

TOUT

(When OUTL=0)

Counter value

Timer reloaded

register

Counter value

TMRLRA + 1

count

count

count

count

count

count

count

TIN (pin) 

TIN (pin) 

TIN pin 

effective edge 

MN705-00010-1v0-E

765