Fujitsu FR81S Manuel D’Utilisation
CHAPTER 24: 16-BIT FREE-RUN TIMER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : 16-BIT FREE-RUN TIMER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
39
5.2.2.
Timer Mode
For the 16-bit free-run timer, you will be able to select either one of the following modes:
⋅
Up count mode (MODE: bit21 of the TCCS register is 0)
⋅
Up/down count mode (MODE: bit21 of the TCCS register is 1)
In the up count mode, the counter starts counting from the timer data register (TCDT) configured in
advance. It continues to count up until the count value matches the value of the compare clear register
(CPCLR). The counter will be cleared to "0000
H
" and start counting up again.
In the up/down count mode, the counter starts counting from the timer data register (TCDT) configured in
advance. It continues to count up until the count value matches the value of the compare clear register
(CPCLR). Then, the counter changes counting method from up count to down count. The counter continues
to count down until the counter value reaches "0000
H
" and starts counting up again.
You will be able to write a value to the mode bit (MODE: bit21 of the TCCS register) whether the timer is
active or inactive. If the timer is active, the value written to this bit will be transferred to the buffer. Then,
when the timer value becomes "0000
H
", the count mode changes.
Figure 5-2 Changing the Timer Mode While the Timer Is Active
FFFF
H
BFFF
H
7FFF
H
3FFF
H
0000
H
Count value
Time
Compare clear
register
TCCS.MODE
TCCS.MODE
BFFF
H
Timer operation start
Change to up/down count mode
Change to up count mode
MB91520 Series
MN705-00010-1v0-E
946