Fujitsu FR81S Manuel D’Utilisation
CHAPTER 41: CAN
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: CAN
FUJITSU SEMICONDUCTOR CONFIDENTIAL
37
4.3.5. IFx Message Control Register : IFxMCTR
The bit configuration of the IFx message control register is shown.
They are used to write/read message object control data in message RAM. The IF1 message control register
will be disabled in the test basic mode. NewDat and MsgLst of the IF2 message control register will operate
normally and the DLC bits will display the DLC of message received. Other control bits will operate as
disabled ("0").
See "4.4 Message Object" for the functions of each bit.
IFx Message Control Register (upper byte): Address Base + 1CH & Base +
4CH (Access: Byte, Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
NewDat
MsgLst
IntPnd
UMask
TxIE
RxIE
RmtEn
TxRqst
Initial value
0
0
0
0
0
0
0
0
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IFx Message Control Register (lower byte): Address Base + 1D
H
& Base + 4D
H
(Access: Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
EoB
Reserved Reserved Reserved
DLC3-0
Initial value
0
0
0
0
0
0
0
0
Attribute
R/W
R0,W0
R0,W0
R0,W0
R/W
R/W
R/W
R/W
See "4.4 Message Object" for explanation of bits.
Notes:
TxRqst, NewDat, and IntPnd bits operate differently depending on the settings of the WR/RD bit in the IFx
command mask register (IFxCMSK).
⋅
If the transfer direction is "write" (IFx command mask register (IFxCMSK): WR/RD="1").
⋅
The TxRqst bit of this register will only be enabled when TxRqst/NewDat in the IFx command mask
register (IFxCMSK) is set to "0".
⋅
If the transfer direction is "read" (IFx command mask register (IFxCMSK): WR/RD="0").
⋅
The IntPnd bit before it has been reset will be stored to this register when the message object and the
IntPnd bit of the CAN interrupt pending register (INTPND) are reset by a write operation to the IFx
command request register (IFxCREQ) after setting the CIP bit of the IFx command mask register
(IFxCMSK) to "1".
⋅
The NewDat bit before it has been reset will be stored to this register when the message object and the
NewDat bit of the CAN data update register are reset by a write operation to the IFx command
request register (IFxCREQ) after setting the TxRqst/NewDat bit of the IFx command mask register
(IFxCMSK) to "1".
MB91520 Series
MN705-00010-1v0-E
1730