Emerson ATCA-9305 Manuel D’Utilisation
4-1
Section 4
Management Complex
The ATCA-9305 management complex is comprised of the Freescale MPC8548 processor,
CPLD, SDRAM, flash, I
CPLD, SDRAM, flash, I
2
C EEPROM, Real-time Clock, and PCI bus interface. Board power-up,
booting and monitoring the Cavium processors, PCI bus arbitration, interrupt servicing,
memory persistence functionality, and other board level management tasks are imple-
mented using the MPC8548 processor. The MPC8548 stores the Cavium operating system
and monitor code in its local memory and then uses the boot over PCI functionality to bring
up the Cavium processor complexes. The CPLD registers are described in Chapter 5. See
Chapter 9 for the Management Processor Monitor.
memory persistence functionality, and other board level management tasks are imple-
mented using the MPC8548 processor. The MPC8548 stores the Cavium operating system
and monitor code in its local memory and then uses the boot over PCI functionality to bring
up the Cavium processor complexes. The CPLD registers are described in Chapter 5. See
Chapter 9 for the Management Processor Monitor.
The management complex connects to the Broadcom Ethernet switch via a 1000BASE-T
Ethernet port. This connection uses the TSEC2 interface operating in SGMII mode. See
Chapter 6, “Ethernet Interface.”
Ethernet port. This connection uses the TSEC2 interface operating in SGMII mode. See
Chapter 6, “Ethernet Interface.”
Figure 4-1:
MPC8548 Management Processor Complex Block Diagram
PCI Bus
RJ45
RJ45
NAND
Flash
1GB
x 16
x 16
BCM56802
XAUI 10 Gb
Switch
3
SGMII
4
SGMII
PCI Bus
IDSEL13
KSL
CPLD
Latched Adrs
A/D
Adrs/Data
Console
I2C
EEPROM
RTC
MPC8548
Management
Processor
J30
Socketed
ROM
512KB
x 8
PQ DDR2
SDRAM
NOR
Flash
4M
x 16
I2C
EEPROM
COP/JTAG
PCIe x4
NOR
Flash
512Mb or
64MB x 16
To Cavium
Processor 2
& Ethernet Switch
To Cavium
Processor 1
Management Processor Complex
PHY
PHY
PHY