Epson ARM720T Manuel D’Utilisation

Epson

Index

ARM DDI 0229B

EPSON

Index-1

Index

The items in this index are listed in alphabetical order, with symbols and numerics appearing

at the end. The references given are to page numbers.

A

Abort

Data 9-6, 9-31
handler 9-6
mode 2-4
Prefetch 9-32
vector 9-31

Abort status register 9-38
Aborted watchpoint 9-31
Aborts

indexed addressing 2-17

prefetch 2-12
types 2-12

Access permission 7-2

Address

translation 7-4

Address mask register 9-33, 9-35
Address value register 9-33
Alignment faults 7-15
AMBA interface

Arbitration, AHB 6-12
ARM instruction set 1-7

addressing mode

five 1-12
four 1-11
three 1-11
two 1-10
two, privileged 1-11

condition fields 1-13
fields 1-12
operand two 1-12

ARM state

register organization 2-5

ARM720T

block diagram 1-2
description 1-1

ATPG test signals

summary 11-2, A-7

B

Banked registers 9-27
Big endian.

see memory format

Boundary-scan

chain cells 9-19
interface 9-19

Breakpoint

address mask 9-37

data-dependent 9-37
entry into debug state 9-6
externally-generated 9-5
hardware 9-36
programming 9-36

Breakpoints

programming 9-36
software 9-36

Bus interface

transfer types 6-5

Bus request

BYPASS instruction 9-21
Bypass register 9-21, 9-22
Byte (data type) 2-3

C

Cache

test register 11-3

CAPTURE-DR state 9-20
CHAIN bit 9-36
Clock

domains 9-9
system 9-8
test 9-8

Coarse page table descriptor 7-8
Communications channel

message transfer from the de-

Condition code flags 2-8
Configuration

compatibility 3-1
description 3-1
notation 3-1

Connecting an ETM7 macrocell
10-2
Control mask 9-33, 9-3 5
Control mask register 9-33, 9-35
Control value

Control value register 9-33, 9-35
Coprocessor 1-5

about 8-1
busy-waiting 8-6
connecting 8-9
data operations 8-7
handshaking 8-5
interface handshaking 8-5
interface signals 8-3, A-2
load and store operations 8-8

CPnCPI 8-6
CPSR (Current Processor Status
Register) 2-8

CPU aborts 7-15
CP15

test registers 11-1

D

Data

abort 9-6, 9 -33

Data bus

Data mask register 9-33, 9-35
Data types 2-3

alignment 2-3
byte 2-3
halfword 2-3
word 2-3

Data value register 9-33
Debug

actions 9-7
breakpoints 9-6
control register 9-39
core state 9-26
entry into debug state from

breakpoint/watch-
point 9-30

exceptions 9-33
host 9-2
interface 9-9
interface signals 9-9
Multi-ICE 9-8
priorities 9-33
request 9-5, 9-7 , 9 -30, 9-31
state 9-7
state, entry from a breakpoint

state, exit from 9-30
status register 9-26, 9-41
system state 9-26
target 9-2
watchpoint 9-6

Debugger

Descriptor

coarse page table 7-8
fine page table 7-9
level one 7-6