National Instruments SCXI-1121 Manuel D’Utilisation
Chapter 5
Programming
© National Instruments Corporation
5-3
3.
For each bit, starting with the MSB first (bit 15):
a.
SERDATIN = bit to be sent. These bits are the data that is being
written to the Slot-Select Register.
written to the Slot-Select Register.
b.
Clear SERCLK to 0.
c.
Set SERCLK to 1. This rising edge clocks the data. (If you are
using an MIO-16 board, writing to the EXTSTROBE* register
will pulse EXTSTROBE* low and then high, accomplishing
steps 3b and 3c.)
using an MIO-16 board, writing to the EXTSTROBE* register
will pulse EXTSTROBE* low and then high, accomplishing
steps 3b and 3c.)
4.
Set SLOT0SEL* to 1. This will assert the SS* line of the module
whose slot number was written to Slot 0. If you are using multiple
chassis, the appropriate slot in the chassis whose address corresponds
to the written chassis number will be selected automatically. When no
communications are taking place between the data acquisition board
and any modules, write zero to the Slot-Select Register to ensure that
no accidental writes occur.
whose slot number was written to Slot 0. If you are using multiple
chassis, the appropriate slot in the chassis whose address corresponds
to the written chassis number will be selected automatically. When no
communications are taking place between the data acquisition board
and any modules, write zero to the Slot-Select Register to ensure that
no accidental writes occur.
5.
If you are writing to a Configuration Register, clear DAQD*/A to 0
(this indicates data will be written to the Configuration Register). If
you are writing to the HSCR or FIFO Register, leave DAQD*/A high.
(this indicates data will be written to the Configuration Register). If
you are writing to the HSCR or FIFO Register, leave DAQD*/A high.
6.
For each bit to be written to the Configuration Register:
a.
Establish the desired SERDATIN level corresponding to this bit.
b.
Clear SERCLK to 0.
c.
Set SERCLK to 1 (clock the data). (If you are using an MIO-16
board, writing to the EXTSTROBE* register will pulse
EXTSTROBE* low and then high, accomplishing steps 6b
and 6c.)
board, writing to the EXTSTROBE* register will pulse
EXTSTROBE* low and then high, accomplishing steps 6b
and 6c.)
7.
Pull SLOT0SEL* low to deassert the SS* line, latch the data into the
Configuration Register and establish conditions for writing a new slot
select number to the Slot 0 Slot-Select Register.
Configuration Register and establish conditions for writing a new slot
select number to the Slot 0 Slot-Select Register.
8.
If you are not selecting another slot, write zero to the Slot 0 Slot-Select
Register. If you are selecting another slot, start at step 3.
Register. If you are selecting another slot, start at step 3.
For a timing illustration of a Configuration Register write, see Figure 2-18,
, which shows the proper
write to configure an SCXI-1121 that is directly cabled to an MIO-16 for
multiple-module multiplexed scanning with a start channel of 3.
multiple-module multiplexed scanning with a start channel of 3.
Initialization
The SCXI-1121 powers up with its Configuration register cleared to all
zeros. You can force this state by an active low signal on the RESET* pin
of the backplane connector. In the reset state, CH0 through CH3 are routed
zeros. You can force this state by an active low signal on the RESET* pin
of the backplane connector. In the reset state, CH0 through CH3 are routed