Renesas H8S/2111B Manuel D’Utilisation
Rev. 1.00, 05/04, page 215 of 544
10.9 Interrupt
Sources
TMR_0, TMR_1, and TMR_Y can generate three types of interrupts: CMIA, CMIB, and OVI.
TMR_X can generate an ICIX interrupt. TMR_A can generate four types of interrupts, CMIA,
CMIB, OVI and ICIA. Table 10.7 shows the interrupt sources and priorities. Each interrupt source
can be enabled or disabled independently by interrupt enable bits in TCR or TCSR. Independent
signals are sent to the interrupt controller for each interrupt.
TMR_X can generate an ICIX interrupt. TMR_A can generate four types of interrupts, CMIA,
CMIB, OVI and ICIA. Table 10.7 shows the interrupt sources and priorities. Each interrupt source
can be enabled or disabled independently by interrupt enable bits in TCR or TCSR. Independent
signals are sent to the interrupt controller for each interrupt.
Table 10.7 Interrupt Sources of 8-Bit Timers TMR_0, TMR_1, TMR_Y, TMR_X TMR_B,
and TMR_A
Channel Name
Interrupt
Source Interrupt
Flag
Interrupt
Priority
Priority
CMIA0 TCORA_0
compare-match CMFA
High
CMIB0 TCORB_0
compare-match CMFB
TMR_0
OVI0 TCNT_0
overflow
OVF
CMIA1 TCORA_1
compare-match CMFA
CMIB1 TCORB_1
compare-match CMFB
TMR_1
OVI1 TCNT_1
overflow
OVF
CMIAY TCORA_Y
compare-match CMFA
CMIBY TCORB_Y
compare-match CMFB
TMR_Y
OVIY TCNT_Y
overflow
OVF
TMR_X ICIX
Input
capture
ICF
CMIAAB
TCORA_A, TCORA_B
compare-match*
compare-match*
CMFA
CMIBAB
TCORB_A, TCORB_B
compare-match*
compare-match*
CMFB
TMR_B,
TMR_A
OVIAB
TCNT_A, TCNT_B overflow* OVF
TMR_A ICIA
Input
capture
ICF
Low
Note: * The interrupt sources for TMR_B and TMR_A are allocated to the same vector
addresses. The bits CMIEB, CMIEA, and OVIE in TCR register of TMR_B or TMR_A
should be set to 1.
should be set to 1.