Jameco Electronics 3000 Manuel D’Utilisation
User’s Manual
T
ABLE
OF
C
ONTENTS
1.1 Features and Specifications Rabbit 3000 ..............................................................................................2
1.2 Summary of Rabbit 3000 Advantages ..................................................................................................6
1.3 Differences Rabbit 3000 vs. Rabbit 2000 .............................................................................................7
1.2 Summary of Rabbit 3000 Advantages ..................................................................................................6
1.3 Differences Rabbit 3000 vs. Rabbit 2000 .............................................................................................7
2.1 The Rabbit 8-bit Processor vs. Other Processors................................................................................10
2.2 Overview of On-Chip Peripherals and Features .................................................................................11
2.2 Overview of On-Chip Peripherals and Features .................................................................................11
2.2.1 5 V Tolerant Inputs ....................................................................................................................11
2.2.2 Serial Ports .................................................................................................................................11
2.2.3 System Clock .............................................................................................................................12
2.2.4 32.768 kHz Oscillator Input .......................................................................................................12
2.2.5 Parallel I/O .................................................................................................................................13
2.2.6 Slave Port ...................................................................................................................................14
2.2.7 Auxiliary I/O Bus .......................................................................................................................15
2.2.8 Timers ........................................................................................................................................15
2.2.9 Input Capture Channels ..............................................................................................................16
2.2.10 Quadrature Encoder Inputs ......................................................................................................17
2.2.11 Pulse Width Modulation Outputs .............................................................................................17
2.2.12 Spread Spectrum Clock ............................................................................................................18
2.2.13 Separate Core and I/O Power Pins ...........................................................................................18
2.2.2 Serial Ports .................................................................................................................................11
2.2.3 System Clock .............................................................................................................................12
2.2.4 32.768 kHz Oscillator Input .......................................................................................................12
2.2.5 Parallel I/O .................................................................................................................................13
2.2.6 Slave Port ...................................................................................................................................14
2.2.7 Auxiliary I/O Bus .......................................................................................................................15
2.2.8 Timers ........................................................................................................................................15
2.2.9 Input Capture Channels ..............................................................................................................16
2.2.10 Quadrature Encoder Inputs ......................................................................................................17
2.2.11 Pulse Width Modulation Outputs .............................................................................................17
2.2.12 Spread Spectrum Clock ............................................................................................................18
2.2.13 Separate Core and I/O Power Pins ...........................................................................................18
2.3 Design Standards ................................................................................................................................18
2.3.1 Programming Port ......................................................................................................................18
2.3.2 Standard BIOS ...........................................................................................................................19
2.3.2 Standard BIOS ...........................................................................................................................19
2.4 Dynamic C Support for the Rabbit .....................................................................................................19
3.1 Processor Registers .............................................................................................................................21
3.2 Memory Mapping ...............................................................................................................................23
3.2 Memory Mapping ...............................................................................................................................23
3.2.1 Extended Code Space .................................................................................................................26
3.2.2 Separate I and D Space - Extending Data Memory ...................................................................27
3.2.3 Using the Stack Segment for Data Storage ................................................................................29
3.2.4 Practical Memory Considerations ..............................................................................................30
3.2.2 Separate I and D Space - Extending Data Memory ...................................................................27
3.2.3 Using the Stack Segment for Data Storage ................................................................................29
3.2.4 Practical Memory Considerations ..............................................................................................30
3.3 Instruction Set Outline ........................................................................................................................32
3.3.1 Load Immediate Data to a Register ............................................................................................33
3.3.2 Load or Store Data from or to a Constant Address ....................................................................33
3.3.3 Load or Store Data Using an Index Register .............................................................................34
3.3.4 Register-to-Register Move .........................................................................................................35
3.3.5 Register Exchanges ....................................................................................................................35
3.3.6 Push and Pop Instructions ..........................................................................................................36
3.3.7 16-bit Arithmetic and Logical Ops ............................................................................................36
3.3.8 Input/Output Instructions ...........................................................................................................39
3.3.2 Load or Store Data from or to a Constant Address ....................................................................33
3.3.3 Load or Store Data Using an Index Register .............................................................................34
3.3.4 Register-to-Register Move .........................................................................................................35
3.3.5 Register Exchanges ....................................................................................................................35
3.3.6 Push and Pop Instructions ..........................................................................................................36
3.3.7 16-bit Arithmetic and Logical Ops ............................................................................................36
3.3.8 Input/Output Instructions ...........................................................................................................39
3.4 How to Do It in Assembly Language—Tips and Tricks ....................................................................40
3.4.1 Zero HL in 4 Clocks ...................................................................................................................40
3.4.2 Exchanges Not Directly Implemented .......................................................................................40
3.4.3 Manipulation of Boolean Variables ...........................................................................................40
3.4.4 Comparisons of Integers ............................................................................................................41
3.4.5 Atomic Moves from Memory to I/O Space ...............................................................................43
3.4.2 Exchanges Not Directly Implemented .......................................................................................40
3.4.3 Manipulation of Boolean Variables ...........................................................................................40
3.4.4 Comparisons of Integers ............................................................................................................41
3.4.5 Atomic Moves from Memory to I/O Space ...............................................................................43