Jameco Electronics 2000 Manuel D’Utilisation
308
Rabbit 3000 Microprocessor
The timing diagrams below illustrate the actual timing for the 32KHz cases of write
cycles. In these cases the chip selects are active for one clock cycle before and one clock
cycle after the trailing edge of the write signal.
cycles. In these cases the chip selects are active for one clock cycle before and one clock
cycle after the trailing edge of the write signal.
Figure B-16. Short Chip Select Timing: 2 kHz, Write Operation
Figure B-17. Short Chip Select Timing: 4 kHz, Write Operation
32KHz
ADDR
DATA
T1
TWA
Valid
MEMWExB
MEMCSxB
clock
2KHz operation
T2
/WEx
/CSx
2 kHz operation
32 kHz
32 kHz
ADDR
DATA
T1
TWA
Valid
/WEx
/CSx
clock
4 kHz operation
T2