Motorola MCF5281 Manuel D’Utilisation
MOTOROLA
Chapter 10. Interrupt Controller Modules
10-7
Register Descriptions
.
31
16
Field
INT[63:48]
Reset
0000_0000_0000_0000
R/W
R
15
0
Field
INT[47:32]
Reset
0000_0000_0000_0000
R/W
R
IPSBAR + 0xC00, 0xD00
Figure 10-1. Interrupt Pending Register High (IPRHn)
Table 10-4. IPRHn Field Descriptions
Bits
Name
Description
31–0
INT
Interrupt pending. Each bit corresponds to an interrupt source. The corresponding IMRHn bit
determines whether an interrupt condition can generate an interrupt. At every system clock, the
IPRHn samples the signal generated by the interrupting source. The corresponding IPRHn bit
reflects the state of the interrupt signal even if the corresponding IMRHn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
determines whether an interrupt condition can generate an interrupt. At every system clock, the
IPRHn samples the signal generated by the interrupting source. The corresponding IPRHn bit
reflects the state of the interrupt signal even if the corresponding IMRHn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
31
16
Field
INT[31:16]
Reset
0000_0000_0000_0000
R/W
R
15
1
0
Field
INT[16:1]
—
Reset
0000_0000_0000_0000
R/W
R
IPSBAR + 0xC04, 0xD04
Figure 10-2. Interrupt Pending Register Low (IPRLn)
Table 10-5. IPRLn Field Descriptions
Bits
Name
Description
31–1
INT
Interrupt Pending. Each bit corresponds to an interrupt source. The corresponding IMRLn bit
determines whether an interrupt condition can generate an interrupt. At every system clock, the
IPRLn samples the signal generated by the interrupting source. The corresponding IPRLn bit reflects
the state of the interrupt signal even if the corresponding IMRLn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
determines whether an interrupt condition can generate an interrupt. At every system clock, the
IPRLn samples the signal generated by the interrupting source. The corresponding IPRLn bit reflects
the state of the interrupt signal even if the corresponding IMRLn bit is set.
0 The corresponding interrupt source does not have an interrupt pending
1 The corresponding interrupt source has an interrupt pending
0
—
Reserved, should be cleared.