Intel 253668-032US Manuel D’Utilisation
Vol. 3 4-53
PAGING
segments can be mapped to pages in several ways. To implement a flat (unseg-
mented) addressing environment, for example, all the code, data, and stack modules
can be mapped to one or more large segments (up to 4-GBytes) that share same
range of linear addresses (see Figure 3-2 in Section 3.2.2). Here, segments are
essentially invisible to applications and the operating-system or executive. If paging
is used, the paging mechanism can map a single linear-address space (contained in
a single segment) into virtual memory. Alternatively, each program (or task) can
have its own large linear-address space (contained in its own segment), which is
mapped into virtual memory through its own paging structures.
Segments can be smaller than the size of a page. If one of these segments is placed
in a page which is not shared with another segment, the extra memory is wasted. For
example, a small data structure, such as a 1-Byte semaphore, occupies 4 KBytes if it
is placed in a page by itself. If many semaphores are used, it is more efficient to pack
them into a single page.
The Intel-64 and IA-32 architectures do not enforce correspondence between the
boundaries of pages and segments. A page can contain the end of one segment and
the beginning of another. Similarly, a segment can contain the end of one page and
the beginning of another.
Memory-management software may be simpler and more efficient if it enforces some
alignment between page and segment boundaries. For example, if a segment which
can fit in one page is placed in two pages, there may be twice as much paging over-
head to support access to that segment.
One approach to combining paging and segmentation that simplifies memory-
management software is to give each segment its own page table, as shown in
Figure 4-12. This convention gives the segment a single entry in the page directory,
and this entry provides the access control information for paging the entire segment.
mented) addressing environment, for example, all the code, data, and stack modules
can be mapped to one or more large segments (up to 4-GBytes) that share same
range of linear addresses (see Figure 3-2 in Section 3.2.2). Here, segments are
essentially invisible to applications and the operating-system or executive. If paging
is used, the paging mechanism can map a single linear-address space (contained in
a single segment) into virtual memory. Alternatively, each program (or task) can
have its own large linear-address space (contained in its own segment), which is
mapped into virtual memory through its own paging structures.
Segments can be smaller than the size of a page. If one of these segments is placed
in a page which is not shared with another segment, the extra memory is wasted. For
example, a small data structure, such as a 1-Byte semaphore, occupies 4 KBytes if it
is placed in a page by itself. If many semaphores are used, it is more efficient to pack
them into a single page.
The Intel-64 and IA-32 architectures do not enforce correspondence between the
boundaries of pages and segments. A page can contain the end of one segment and
the beginning of another. Similarly, a segment can contain the end of one page and
the beginning of another.
Memory-management software may be simpler and more efficient if it enforces some
alignment between page and segment boundaries. For example, if a segment which
can fit in one page is placed in two pages, there may be twice as much paging over-
head to support access to that segment.
One approach to combining paging and segmentation that simplifies memory-
management software is to give each segment its own page table, as shown in
Figure 4-12. This convention gives the segment a single entry in the page directory,
and this entry provides the access control information for paging the entire segment.
Figure 4-12. Memory Management Convention That Assigns a Page Table
to Each Segment
Seg. Descript.
LDT
Seg. Descript.
PDE
Page Directory
PDE
PTE
PTE
PTE
PTE
PTE
PTE
PTE
PTE
Page Tables
Page Frames