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Renesas R5S72623 Manuel D’Utilisation

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Section 10   Direct Memory Access Controller 
 
R01UH0134EJ0400  Rev. 4.00  
 
Page 403 of 2108 
Sep 24, 2014 
 
 
 
SH7262 Group, SH7264 Group 
  DMARS0 
 
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
CH1 MID[5:0]
CH1 RID[1:0]
CH0 RID[1:0]
CH0 MID[5:0]
 
 
  DMARS1 
 
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
CH3 MID[5:0]
CH3 RID[1:0]
CH2 RID[1:0]
CH2 MID[5:0]
 
 
  DMARS2 
 
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
CH5 MID[5:0]
CH5 RID[1:0]
CH4 RID[1:0]
CH4 MID[5:0]
 
 
  DMARS3 
 
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
CH7 MID[5:0]
CH7 RID[1:0]
CH6 RID[1:0]
CH6 MID[5:0]
 
 
  DMARS4 
 
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
CH9 MID[5:0]
CH9 RID[1:0]
CH8 RID[1:0]
CH8 MID[5:0]
 
 
  DMARS5 
 
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
R/W:
CH11 MID[5:0]
CH11 RID[1:0]
CH10 RID[1:0]
CH10 MID[5:0]