Renesas R5S72645 Manuel D’Utilisation
Section 22 Renesas SPDIF Interface
Page 1156 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
22.7
Register Descriptions
Legend:
Initial Value: Register value after reset
:
:
Undefined
value
R/W:
Readable/writable
register. The write value can be read.
R:
Read only register. The write value should always be 0.
R/WC0:
Readable/writable register. Writing 0 initializes the bit, but writing 1 is ignored.
R/WC1:
Readable/writable register. Writing 1 initializes the bit, but writing 0 is ignored.
W:
Write only register. Reading is prohibited. If this bit is reserved, the write value
should always be 0.
should always be 0.
—/W:
Write only, Read value undefined
22.7.1
Control Register (CTRL)
31
30
29
28
27
26
25
24
0
0
0
0
0
-
-
-
CKS
-
0
0
0
R
R
R
R/W
R
R/W
R/W
R/W
PB
RASS
23
22
21
20
19
18
17
16
0
0
0
0
0
TASS
RDE
TDE
NCSI
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
AOS
RME
TME
15
14
13
12
11
10
9
8
0
0
0
0
0
REIE
TEIE
UBOI UBUI CREI
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PAEI PREI
CSEI
7
6
5
4
3
2
1
0
0
0
0
0
0
ABOI
ABUI
RUII
TUII
RCSI
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RCBI TCSI
TCBI
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W: