Intel Xeon L3406 CM80616005010AA Manuel D’Utilisation
Codes de produits
CM80616005010AA
Processor Integrated I/O (IIO) Configuration Registers
30
Datasheet, Volume 2
illustrates how each PCI Express port’s configuration space appears to
software. Each PCI Express configuration space has three regions:
• Standard PCI Header — This region is the standard PCI-to-PCI bridge header
providing legacy OS compatibility and resource management.
• PCI Device Dependent Region — This region is also part of standard PCI
configuration space and contains the PCI capability structures and other port
specific registers. For the IIO, the supported capabilities are:
specific registers. For the IIO, the supported capabilities are:
— SVID/SDID Capability
— Message Signalled Interrupts
— Power Management
— PCI Express Capability
— Message Signalled Interrupts
— Power Management
— PCI Express Capability
• PCI Express Extended Configuration Space — This space is an enhancement
beyond standard PCI and only accessible with PCI Express aware software.
Note that all the capabilities listed above for a PCI Express port are required for a DMI
port. Through the rest of the chapter, as each register is elaborated, it will be noted
which registers are applicable to the PCI Express port and which are applicable to the
DMI port.
port. Through the rest of the chapter, as each register is elaborated, it will be noted
which registers are applicable to the PCI Express port and which are applicable to the
DMI port.