Cisco Cisco Aironet 350 Wireless LAN Client Adapter
4
Release Notes for Cisco Aironet 802.11a/b/g Client Adapters (CB21AG and PI21AG) Install Wizard 4.0
OL-14455-01
Important Notes
Figure 1
Cisco Security Agent Dialog Box
Mismatch between HP DC5 100 PCI Bus Controller and PCI Key Cache Register
on PI21AG Chip
on PI21AG Chip
A mismatch exists between the HP DC5100 PCI bus controller and the PCI key cache register on the
chip of the PI21AG. The key cache uses a 48-bit register in which the PI21AG sends out two write cycles
on the PCI bus consecutively (DWORD and WORD). The controller on the device cannot handle two
consecutive write cycles on the bus, which causes a fatal error on the PCI bus.
chip of the PI21AG. The key cache uses a 48-bit register in which the PI21AG sends out two write cycles
on the PCI bus consecutively (DWORD and WORD). The controller on the device cannot handle two
consecutive write cycles on the bus, which causes a fatal error on the PCI bus.
You should slow down the write operations to the key cache by performing a register read cycle before
and after a register write cycle. To slow down the write operations, install registry key singleWriteKC=1.
The path of the singleWriteKC=1 registry key is the following:
and after a register write cycle. To slow down the write operations, install registry key singleWriteKC=1.
The path of the singleWriteKC=1 registry key is the following:
HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Control\Class\{4D36E972-E325-11CE-BF
C1-08002bE10318}
C1-08002bE10318}
You should not see any system performance degradation because the key cache is only changed every
few minutes. An additional read cycle before the second write cycle only lasts a few micro seconds in
the PCI space.
few minutes. An additional read cycle before the second write cycle only lasts a few micro seconds in
the PCI space.