Yamaha yss912 Manuel D’Utilisation
YSS912
AC3D2
Dolby Digital (AC-3) / Pro Logic / DTS decoder + Sub DSP
YAMAHA CORPORATION
YSS912CATALOG
CATALOG No.:LSI-4SS912A2
1998. 10
INTRODUCTION
The YSS912 is one chip LSI consisting two built-in DSP’s ; Dolby Digital (AC-3) / Pro Logic / DTS decoder
(Main DSP) and a sound processing DSP (Sub DSP). Sub DSP is capable of realizing various sound fields, such as
virtual surround, by down-loading the program and coefficient. Sub DSP is compatible with YSS902, the Sub DSP
programs developed for YSS902 are also applicable to YSS912.
(Main DSP) and a sound processing DSP (Sub DSP). Sub DSP is capable of realizing various sound fields, such as
virtual surround, by down-loading the program and coefficient. Sub DSP is compatible with YSS902, the Sub DSP
programs developed for YSS902 are also applicable to YSS912.
FEATURERS
Pin compatible with YSS902 (AC3D).
Dolby Digital (AC-3) / Pro Logic and DTS decode.
24 bit DSP. (Group-A Dolby Digital decoder)
24 bit DSP. (Group-A Dolby Digital decoder)
No external memory is required (Memory for center and surround channel delay is included) when DTS
decoding as well as AC-3 / Pro Logic.
Possible to decode multi-language encoded data. (possible to decode based on data-stream-number)
AC-3 karaoke mode.
Original compression mode as well as four compression modes recommended by Dolby. (when AC-3 decoding)
AC-3 karaoke mode.
Original compression mode as well as four compression modes recommended by Dolby. (when AC-3 decoding)
Included de-emphasis filter.
Pro Logic decoding for Dolby digital 2 channels decoded signal as well as ordinary PCM.
Pro Logic decoding for Dolby digital 2 channels decoded signal as well as ordinary PCM.
High performance 25 MIPS programmable DSP suitable for a variety of sound field processing such as original
surround , filtering, virtual surround etc.
Up to 1.36 second delay time is capable when used with an external 1Mbit SRAM. (at fs= 48 kHz)
Reads Dolby Digital (AC-3)/DTS decode information through the microprocessor interface.
Provide total sixteen I/O ports.
Possible to connect most of SPDIF receivers, A/D and D/A converters, by setting I/O data interface format.
Has a built-in PLL oscillation circuit to generates its own operating clock.
Provide total sixteen I/O ports.
Possible to connect most of SPDIF receivers, A/D and D/A converters, by setting I/O data interface format.
Has a built-in PLL oscillation circuit to generates its own operating clock.
Internal operating clock is 30 MHz.
Supply Voltage: 3.3v for core logic. 5v for I/Os.
Power saving mode.
Si-gate CMOS process.
100 QFP.(YSS912-F)
Supply Voltage: 3.3v for core logic. 5v for I/Os.
Power saving mode.
Si-gate CMOS process.
100 QFP.(YSS912-F)
Note: "AC-3" and "Pro Logic" are registered trademarks of Dolby Laboratories Licensing Corporation.
"DTS" is a registered trademark of DTS, Inc.
Use of this LSI must be licensed by both Dolby Laboratories Licensing Corporation and DTS, Inc.
Use of this LSI must be licensed by both Dolby Laboratories Licensing Corporation and DTS, Inc.