SMSC USB2502 Manuel D’Utilisation
2-Port USB 2.0 Hub Controller
Datasheet
Revision 2.3 (08-27-07)
24
SMSC USB2502
DATASHEET
5.2.3.12
EEPROM Offset E(h) - Hub Controller Max Current For Bus Powered Operation
5.2.3.13
EEPROM Offset F(h) - Power-On Time
5.3
SMBus Slave Interface
Instead of loading User-Defined Descriptor data from an external EEPROM, the SMSC Hub can be
configured to receive a code load from an external processor via an SMBus interface. The SMBus
interface shares the same pins as the EEPROM interface, if CFG_SEL1 & CFG_SEL0 activates the
SMBus interface, external EEPROM support is no longer available (and the user-defined descriptor
data must be downloaded via the SMBus). Due to system issues, the SMSC Hub waits indefinitely for
the SMBus code load to complete and only “appears” as a newly connected device on USB after the
code load is complete.
configured to receive a code load from an external processor via an SMBus interface. The SMBus
interface shares the same pins as the EEPROM interface, if CFG_SEL1 & CFG_SEL0 activates the
SMBus interface, external EEPROM support is no longer available (and the user-defined descriptor
data must be downloaded via the SMBus). Due to system issues, the SMSC Hub waits indefinitely for
the SMBus code load to complete and only “appears” as a newly connected device on USB after the
code load is complete.
The Hub’s SMBus implementation is a subset of the SMBus interface to the host. The device is a
slave-only
slave-only
SMBus device. The implementation in the device is a subset of SMBus since it only supports
two protocols.
The Write Byte and Read Byte protocols are the only valid SMBus protocols for the Hub. The Hub
responds to other protocols as described in
responds to other protocols as described in
. Reference the System Management Bus Specification, Rev 1.0.
The SMBus interface is used to read and write the registers in the device. The register set is shown
in
in
.
5.3.1
Bus Protocols
Typical Write Byte and Read Byte protocols are shown below. Register accesses are performed using
7-bit slave addressing, an 8-bit register address field, and an 8-bit data field. The shading indicates
the Hub driving data on the SMBDATA line; otherwise, host data is on the SDA/SMBDATA line.
7-bit slave addressing, an 8-bit register address field, and an 8-bit data field. The shading indicates
the Hub driving data on the SMBDATA line; otherwise, host data is on the SDA/SMBDATA line.
The slave address is the unique SMBus Interface Address for the Hub that identifies it on SMBus. The
register address field is the internal address of the register to be accessed. The register data field is
the data that the host is attempting to write to the register or the contents of the register that the host
is attempting to read.
register address field is the internal address of the register to be accessed. The register data field is
the data that the host is attempting to write to the register or the contents of the register that the host
is attempting to read.
Note:
Data bytes are transferred MSB first (msb first).
BIT
NUMBER
BIT NAME
DESCRIPTION
7:0
HC_MAX_C_BP
Hub Controller Max Current Bus-Powered: Value in 2mA increments that the
Hub consumes from an upstream port (VBUS) when operating as a self-
powered hub. This value includes the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board.
This value does NOT include the power consumption of a permanently
attached peripheral if the hub is configured as a compound device.
Hub consumes from an upstream port (VBUS) when operating as a self-
powered hub. This value includes the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board.
This value does NOT include the power consumption of a permanently
attached peripheral if the hub is configured as a compound device.
A value of 50 (decimal) indicates 100mA, which is the default value.
BIT
NUMBER
BIT NAME
DESCRIPTION
7:0
POWER_ON_TIME
Power On Time: The length of time that is takes (in 2 ms intervals) from the
time the host initiated power-on sequence begins on a port until power is
good on that port.
time the host initiated power-on sequence begins on a port until power is
good on that port.