Intel architecture ia-32 Manuel D’Utilisation
Vol. 3A 8-23
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
The ICR consists of the following fields.
Vector
The vector number of the interrupt being sent.
Delivery Mode
Specifies the type of IPI to be sent. This field is also know as the IPI
message type field.
message type field.
000 (Fixed)
Delivers the interrupt specified in the vector field
to the target processor or processors.
to the target processor or processors.
001 (Lowest Priority)
Same as fixed mode, except that the interrupt is
delivered to the processor executing at the lowest
priority among the set of processors specified in
the destination field. The ability for a processor to
delivered to the processor executing at the lowest
priority among the set of processors specified in
the destination field. The ability for a processor to
Figure 8-12. Interrupt Command Register (ICR)
31
0
Reserved
7
Vector
Destination Shorthand
8
10
Delivery Mode
000: Fixed
001: Lowest Priority
000: Fixed
001: Lowest Priority
1
00: No Shorthand
01: Self
11
12
13
14
15
16
17
18
19
10: All Including Self
11: All Excluding Self
010: SMI
011: Reserved
100: NMI
101: INIT
110: Start Up
111: Reserved
011: Reserved
100: NMI
101: INIT
110: Start Up
111: Reserved
Destination Mode
0: Physical
1: Logical
0: Physical
1: Logical
Delivery Status
0: Idle
1: Send Pending
0: Idle
1: Send Pending
Level
0 = De-assert
1 = Assert
0 = De-assert
1 = Assert
Trigger Mode
0: Edge
1: Level
0: Edge
1: Level
63
32
Reserved
Destination Field
56
Address: FEE0 0300H (0 - 31)
Value after Reset: 0H
Reserved
20
55
FEE0 0310H (32 - 63)
NOTE:
1. The ability of a processor to send Lowest Priority IPI is model specific.
1. The ability of a processor to send Lowest Priority IPI is model specific.