ZBA Inc. BT44-291S Manuel D’Utilisation
BT44-291S
Page 12 of 18
PIO lines can be configured through software to have either weak or strong pull-ups or
pull-downs. All PIO lines are configured as inputs with weak pull-downs at reset.
PIO[0] and PIO[1] are normally dedicated to RXEN and TXEN respectively, but they are
available for general use.
Any of the PIO lines can be configured as interrupt request lines or as wake-up lines from
sleep modes. PIO[6] or PIO [2] can be configured as a request line for an external clock source.
This is useful when the clock to BlueCore4-External is provided from a system application
specific integrated circuit (ASIC).
This is useful when the clock to BlueCore4-External is provided from a system application
specific integrated circuit (ASIC).
BlueCore4-External has three general purpose analogue interface pins, AIO[0], AIO[1].
These are used to access internal circuitry and control signals. One pin is allocated to decoupling
for the on-chip band gap reference voltage, the other three may be configured to provide
additional functionality.
for the on-chip band gap reference voltage, the other three may be configured to provide
additional functionality.
Auxiliary functions available via these pins include an 8-bit ADC and an 8-bit DAC.
Typically the ADC is used for battery voltage measurement. Signals selectable at these pins
include the band gap reference voltage and a variety of clock signals; 48, 24, 16, 8MHz and the
XTAL clock frequency. When used with analogue signals the voltage range is constrained by the
analogue supply voltage (1.8V). When configured to drive out digital level signals (clocks)
generated from within the analogue part of the device, the output voltage level is determined by
Vref (1.8V).
include the band gap reference voltage and a variety of clock signals; 48, 24, 16, 8MHz and the
XTAL clock frequency. When used with analogue signals the voltage range is constrained by the
analogue supply voltage (1.8V). When configured to drive out digital level signals (clocks)
generated from within the analogue part of the device, the output voltage level is determined by
Vref (1.8V).
Important Note:
CSR cannot guarantee that terminal functions PIOs remain the same. Please refer to the
CSR cannot guarantee that terminal functions PIOs remain the same. Please refer to the
software release note for the implementation of these PIO lines, as they are firmware build
specific.
specific.
10. IIC Interface
PIO[8:6] can be used to form a Master I2C interface. The interface is formed using software
to drive these lines.Therefore it is suited only to relatively slow functions such as driving a dot
matrix liquid crystal display (LCD),keyboard scanner or EEPROM.
matrix liquid crystal display (LCD),keyboard scanner or EEPROM.
Note:
PIO[7:6] dual functions, UART bypass and EEPROM support, therefore devices using an
PIO[7:6] dual functions, UART bypass and EEPROM support, therefore devices using an
EEPROM cannot support UART bypass mode PIO lines need to be pulled-up through 2.2kΩ
resistors.
resistors.
For connection to EEPROMs, refer to CSR documentation on I2C EEPROMS for use with
BlueCore. This provides information on the type of devices which are currently supported.