Digi International Inc 50M1663 Manuel D’Utilisation
23
ConnectCore 9M 2443 & Wi-9M 2443 Hardware Reference
C h a p t e r 1
RSTIN# signal from the base board is connected to the reset generator device
on the module. At the base board there could be a reset switch connected to
the RSTIN# signal. A 10k pull up resistor is connected to the RSTIN# signal on
the module.
on the module. At the base board there could be a reset switch connected to
the RSTIN# signal. A 10k pull up resistor is connected to the RSTIN# signal on
the module.
PWRGOOD must be held to low level at least 4 FCLKs to recognize the reset
signal.
signal.
The low active reset of the reset controller is connected to the system via a 470R
series resistor.
series resistor.
RSTOUT# can be used for external device reset control. RSTOUT# is a function of
Watchdog Reset and Software Reset (RSTOUT# = PWRGOOD & WDTRST# &
SW_RESET).
Watchdog Reset and Software Reset (RSTOUT# = PWRGOOD & WDTRST# &
SW_RESET).
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M e m o r y
DDR SDRAM
memory
memory
On the module there are two banks provided for DDR SDRAM memory. Both banks can
support a 16-bit mobile DDR memory chip. Bank 1 provides one part of a 16bit DDR
SDRAM in a FBGA60 package, with 1.8V power supply.
support a 16-bit mobile DDR memory chip. Bank 1 provides one part of a 16bit DDR
SDRAM in a FBGA60 package, with 1.8V power supply.
Total size of memory is possible from 16MB (only one bank) up to 256MB (128MB each
bank).
bank).
Both banks have to be populated with equal devices since they share all control
signals with the exception of their chip selects.These are defined in the bank control
registers BANKCFG and BANKCON1-3 and Refresh Control Register.
signals with the exception of their chip selects.These are defined in the bank control
registers BANKCFG and BANKCON1-3 and Refresh Control Register.
NAND Flash
memory
memory
NAND Flash memory is provided, as a single Flash device. In order to support NAND
flash boot loader, the S3C2443 is equipped with an internal SRAM buffer called
Steppingstone. When booting, the first 4 KBytes of the NAND flash memory will be
loaded into Steppingstone and the boot code loaded into Steppingstone will be
executed.
flash boot loader, the S3C2443 is equipped with an internal SRAM buffer called
Steppingstone. When booting, the first 4 KBytes of the NAND flash memory will be
loaded into Steppingstone and the boot code loaded into Steppingstone will be
executed.
Generally, the boot code will copy NAND flash content to DDR-SDRAM. Using hardware
ECC, the NAND flash data validity will be checked. Upon the completion of the copy,
the main program will be executed on the DDR-SDRAM.
ECC, the NAND flash data validity will be checked. Upon the completion of the copy,
the main program will be executed on the DDR-SDRAM.
Features:
NAND Flash memory I/F: Supports 512Bytes and 2KBytes Page.
Interface: 8-bit NAND flash memory interface bus.
Hardware ECC generation, detection and indication (Software correction).