Fujitsu Intel Xeon E7330 S26361-F3487-L330 Fiche De Données

Document Number: 318080-002

27

9.

Minimum VCC and maximum ICC are specified at the maximum processor case temperature (TCASE) 

shown in 

.

10. This specification refers to the total reduction of the load line due to VID transitions below the specified 

VID.

11. Individual processor VID values may be calibrated during manufacturing such that two devices at the same 

frequency may have different VID settings.

12. This specification applies to the VCCPLL pin.

13. Baseboard bandwidth is limited to 20 MHz.

14. I

CC_TDC

 is the sustained (DC equivalent) current that the processor is capable of drawing indefinitely and 

should be used for the voltage regulator temperature assessment. The voltage regulator is responsible for 

monitoring its temperature and asserting the necessary signal to inform the processor of a thermal 

excursion. Please see the applicable design guidelines for further details. The processor is capable of 

drawing I

CC_TDC

 indefinitely. Refer to 

 for further details on the average processor current draw 

over various time durations. This parameter is based on design characterization and is not tested.

15. This is the maximum total current drawn from the V

TT

 plane by only one processor with R

TT

 enabled. This 

specification does not include the current coming from on-board termination (R

TT

), through the signal line. 

Refer to the appropriate platform design guide and the Voltage Regulator Design Guidelines to determine 

the total I

TT

 drawn by the system. This parameter is based on design characterization and is not tested.

16. I

CC

_

VTT

_

OUT

 is specified at 1.2 V.

17. I

CC_RESET

 is specified while PWRGOOD and RESET# are asserted. Refer to 

 for the PWRGOOD to 

RESET# de-assertion time specification and 

 for the RESET# Pulse Width specification.

1.

Processor or Voltage Regulator thermal protection circuitry should not trip for load currents greater than 

I

CC_TDC

.

2.

Not 100% tested. Specified by design characterization.

40

45

50

55

60

65

0.01

0.1

1

10

100

1000