Intel III 450 MHz 80525PY450512 Fiche De Données

Codes de produits
80525PY450512
Page de 101
Datasheet
39
Electrical Specifications
Figure 11. Power-On Reset and Configuration Timings
Figure 12. Test Timings (TAP Connection)
Figure 13. Test Reset Timings
T
a
T
b
PWRGOOD
RESET#
T
a
= T15 (PWRGOOD Inactive Pulse)
T
b
= T10 (RESET# Pulse Width)
BCLK
V
IL, max
V
IH, min
Vccp,
Vcc,
V
REF
T
r
 = T43 (All Non-Test Inputs Setup Time)
T
s
 = T44 (All Non-Test Inputs Hold Time)
T
u
 = T40 (TDO Float Delay)
T
v
 = T37 (TDI, TMS Setup Time)
T
w
 = T38 (TDI, TMS Hold TIme)
T
x
 = T39 (TDO Valid Delay)
T
y
 = T41 (All Non-Test Outputs Valid Delay)
T
z
 = T42  (All Non-Test Outputs Float Time)
V  = 1.25V (CPUID 067xh) or 0.75V (CPUID 068xh)
T
v
T
w
T
r
T
s
T
u
T
z
T
x
T
y
TCK
TDI, TMS
Input
Signal
TDO
Output
Signal
V
V
T
q
TRST#
T
q
 = T36 (TRST# Pulse Width)
V  = 1.25V (CPUID 067xh) or 0.75V (CPUID 068xh)
V