Intel i3-3110M AW8063801032700 Manuel D’Utilisation
Codes de produits
AW8063801032700
Datasheet, Volume 1
81
Thermal Management
The DTS-relative temperature readout directly impacts the Adaptive Thermal Monitor
trigger point. When a package DTS indicates that it has reached the TCC activation (a
reading of 0h, except when the TCC activation offset is changed), the TCC will activate
and indicate a Adaptive Thermal Monitor event. A TCC activation will lower both IA core
and graphics core frequency, voltage or both.
trigger point. When a package DTS indicates that it has reached the TCC activation (a
reading of 0h, except when the TCC activation offset is changed), the TCC will activate
and indicate a Adaptive Thermal Monitor event. A TCC activation will lower both IA core
and graphics core frequency, voltage or both.
Changes to the temperature can be detected using two programmable thresholds
located in the processor thermal MSRs. These thresholds have the capability of
generating interrupts using the core's local APIC. Refer to the Intel
located in the processor thermal MSRs. These thresholds have the capability of
generating interrupts using the core's local APIC. Refer to the Intel
®
64 and IA-32
Architectures Software Developer's Manuals for specific register and programming
details.
details.
5.6.2.1
Digital Thermal Sensor Accuracy (Taccuracy)
The error associated with DTS measurement will not exceed ±5 °C at T
j,max
. The DTS
measurement within the entire operating range will meet a ±5 °C accuracy.
5.6.2.2
Fan Speed Control with Digital Thermal Sensor
Digital Thermal Sensor based fan speed control (T
FAN
) is a recommended feature to
achieve optimal thermal performance. At the T
FAN
temperature, Intel recommends full
cooling capability well before the DTS reading reaches T
j,max
. An example of this would
be T
FAN
= T
j,max
– 10 ºC.
5.6.3
PROCHOT# Signal
PROCHOT# (processor hot) is asserted when the processor core temperature has
reached its maximum operating temperature (T
reached its maximum operating temperature (T
j,max
for a timing diagram of the PROCHOT# signal assertion
relative to the Adaptive Thermal Response. Only a single PROCHOT# pin exists at a
package level. When any core arrives at the TCC activation point, the PROCHOT# signal
will be asserted. PROCHOT# assertion policies are independent of Adaptive Thermal
Monitor enabling.
package level. When any core arrives at the TCC activation point, the PROCHOT# signal
will be asserted. PROCHOT# assertion policies are independent of Adaptive Thermal
Monitor enabling.
Note:
Bus snooping and interrupt latching are active while the TCC is active.
Note:
For the package C7 state, PROCHOT# may de-assert for the duration of the C7 state
residency, even if the processor enters the idle state operating at the TCC activation
temperature. The PECI interface is fully operational during all C-states and it is
expected that the platform continues to manage processor package thermals, even
during idle states by regularly polling for thermal data over PECI.
5.6.3.1
Bi-Directional PROCHOT#
By default, the PROCHOT# signal is defined as an output only. However, the signal may
be configured as bi-directional. When configured as a bi-directional signal, PROCHOT#
can be used for thermally protecting other platform components should they overheat
as well. When PROCHOT# is driven by an external device:
be configured as bi-directional. When configured as a bi-directional signal, PROCHOT#
can be used for thermally protecting other platform components should they overheat
as well. When PROCHOT# is driven by an external device:
• the package will immediately transition to the minimum operation points (voltage
and frequency) supported by the processor and graphics cores. This is contrary to
the internally-generated Adaptive Thermal Monitor response.
the internally-generated Adaptive Thermal Monitor response.
• Clock modulation is not activated.