HP A2Y15AV Manuel D’Utilisation
Processor Configuration Registers
232
Datasheet, Volume 2
2.12.22 DMILE2D—DMI Link Entry 2 Description Register
This register provides the first part of a Link Entry that declares an internal link to
another Root Complex Element.
another Root Complex Element.
B/D/F/Type:
0/0/0/DMIBAR
Address Offset:
60–63h
Reset Value:
00000000h
Access:
RO, RW-O
Size:
32 bits
BIOS Optimal Default
0000h
Bit
Access
Reset
Value
RST/
PWR
Description
31:24
RO
00h
Uncore
Target Port Number (TPN)
This field specifies the port number associated with the element
This field specifies the port number associated with the element
targeted by this link entry (Egress Port). The target port number
is with respect to the component that contains this element as
specified by the target component ID.
23:16
RW-O
00h
Uncore
Target Component ID (TCID)
This field identifies the physical or logical component that is
This field identifies the physical or logical component that is
targeted by this link entry.
BIOS Requirement: This field must be initialized according to
BIOS Requirement: This field must be initialized according to
guidelines in the PCI Express* Isochronous/Virtual Channel
Support Hardware Programming Specification (HPS).
15:2
RO
0h
Reserved (RSVD)
1
RO
0b
Uncore
Link Type (LTYP)
This field indicates that the link points to memory-mapped space
This field indicates that the link points to memory-mapped space
(for RCRB).
The link address specifies the 64-bit base address of the target
The link address specifies the 64-bit base address of the target
RCRB.
0
RW-O
0b
Uncore
Link Valid (LV)
0 = Link Entry is not valid and will be ignored.
1 = Link Entry specifies a valid link.
0 = Link Entry is not valid and will be ignored.
1 = Link Entry specifies a valid link.