Intel Celeron 360 HH80552RE099512 Manuel D’Utilisation
Codes de produits
HH80552RE099512
Electrical Specifications
24
Datasheet
NOTES:
1.
1.
Refer to
for signal descriptions.
2.
The value of these signals during the active-to-inactive edge of RESET# defines the
processor configuration options. See
processor configuration options. See
for details.
3.
In processor systems where no debug port is implemented on the system board, these
signals are used to support a debug port interposer. In systems with the debug port
implemented on the system board, these signals are no connects.
signals are used to support a debug port interposer. In systems with the debug port
implemented on the system board, these signals are no connects.
.
TAP Output
Synchronous to
TCK
TCK
TDO
FSB Clock
Clock
BCLK[1:0], ITP_CLK[1:0]
3
Power/Other
VCC, VTT, VCCA, VCCIOPLL, VID[5:0], VSS, VSSA,
GTLREF[1:0], COMP[5:4,1:0], RESERVED, TESTHI[13:0],
THERMDA, THERMDC, VCC_SENSE,
VCC_MB_REGULATION, VSS_SENSE,
VSS_MB_REGULATION, BSEL[2:0], SKTOCC#, DBR#
GTLREF[1:0], COMP[5:4,1:0], RESERVED, TESTHI[13:0],
THERMDA, THERMDC, VCC_SENSE,
VCC_MB_REGULATION, VSS_SENSE,
VSS_MB_REGULATION, BSEL[2:0], SKTOCC#, DBR#
3
,
VTTPWRGD, BOOTSELECT, VTT_OUT_LEFT,
VTT_OUT_RIGHT, VTT_SEL, LL_ID[1:0], MSID[1:0], FCx,
IMPSEL
VTT_OUT_RIGHT, VTT_SEL, LL_ID[1:0], MSID[1:0], FCx,
IMPSEL
Table 7.
FSB Signal Groups (Sheet 2 of 2)
Signal Group
Type
Signals
1
Table 8.
Signal Characteristics
Signals with R
TT
Signals with No R
TT
A[35:3]#, ADS#, ADSTB[1:0]#, AP[1:0]#,
BINIT#, BNR#, BOOTSELECT
BINIT#, BNR#, BOOTSELECT
1
, BPRI#,
D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,
DP[3:0]#, DRDY#, DSTBN[3:0]#,
DSTBP[3:0]#, HIT#, HITM#, LOCK#, MCERR#,
MSID[1:0]
DP[3:0]#, DRDY#, DSTBN[3:0]#,
DSTBP[3:0]#, HIT#, HITM#, LOCK#, MCERR#,
MSID[1:0]
, PROCHOT#, REQ[4:0]#, RS[2:0]#,
RSP#, TRDY#, IMPSEL
2
NOTES:
1. These signals have a 500–5000 Ω pull-up to V
TT
rather than on-die termination.
A20M#, BCLK[1:0], BPM[5:0]#, BSEL[2:0],
COMP[5:4,1:0], FERR#/PBE#, IERR#,
IGNNE#, INIT#, ITP_CLK[1:0], LINT0/INTR,
LINT1/NMI, PWRGOOD, RESET#, SKTOCC#,
SMI#, STPCLK#, TDO, TESTHI[13:0],
THERMDA, THERMDC, THERMTRIP#,
VID[5:0], VTTPWRGD, GTLREF[1:0], TCK,
TDI, TMS, TRST#, VTT_SEL
COMP[5:4,1:0], FERR#/PBE#, IERR#,
IGNNE#, INIT#, ITP_CLK[1:0], LINT0/INTR,
LINT1/NMI, PWRGOOD, RESET#, SKTOCC#,
SMI#, STPCLK#, TDO, TESTHI[13:0],
THERMDA, THERMDC, THERMTRIP#,
VID[5:0], VTTPWRGD, GTLREF[1:0], TCK,
TDI, TMS, TRST#, VTT_SEL
Open Drain Signals
2
2.
Signals that do not have R
TT
,
nor are actively driven to their high-voltage level.
THERMTRIP#, FERR#/PBE#, IERR#, BPM[5:0]#,
BR0#, TDO, LL_ID[1:0], FCx
BR0#, TDO, LL_ID[1:0], FCx
Table 9.
Signal Reference Voltages
GTLREF
V
TT
/2
BPM[5:0]#, LINT0/INTR, LINT1/NMI, RESET#,
BINIT#, BNR#, HIT#, HITM#, MCERR#, PROCHOT#,
BR0#, A[35:0]#, ADS#, ADSTB[1:0]#, AP[1:0]#,
BPRI#, D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,
DP[3:0]#, DRDY#, DSTBN[3:0]#, DSTBP[3:0]#,
LOCK#, REQ[4:0]#, RS[2:0]#, RSP#, TRDY#
BINIT#, BNR#, HIT#, HITM#, MCERR#, PROCHOT#,
BR0#, A[35:0]#, ADS#, ADSTB[1:0]#, AP[1:0]#,
BPRI#, D[63:0]#, DBI[3:0]#, DBSY#, DEFER#,
DP[3:0]#, DRDY#, DSTBN[3:0]#, DSTBP[3:0]#,
LOCK#, REQ[4:0]#, RS[2:0]#, RSP#, TRDY#
BOOTSELECT, VTTPWRGD, A20M#,
IGNNE#, INIT#, MSID[1:0],
PWRGOOD
IGNNE#, INIT#, MSID[1:0],
PWRGOOD
1
, SMI#, STPCLK#, TCK
, TMS
, TRST#
NOTES:
1.
These signals also have hysteresis added to the reference voltage. See
for more
information.