Intel 4 3.20 GHz BX80532PG3200F Manuel D’Utilisation
Codes de produits
BX80532PG3200F
Intel
®
Pentium
®
4 Processor on 0.13 Micron Process Datasheet
7
Revision History
Revision
Description
Date
-005
Added Thermal and Electrical Specifications for frequencies through 3.06
GHz and included multiple VID specifications. Updated the THERMTRIP#
and DBI# signal descriptions. Removed Deep Sleep State section. Updated
Boxed Processor Fan Heatsink Set Points table and figure. Update Power-
on Configuration Option pins table.
GHz and included multiple VID specifications. Updated the THERMTRIP#
and DBI# signal descriptions. Removed Deep Sleep State section. Updated
Boxed Processor Fan Heatsink Set Points table and figure. Update Power-
on Configuration Option pins table.
November
2002
-006
Minor update to DC specifications
December
2002
-007
Corrected Table 4-3, Signal Description. Item TRST#, last sentence.
Measurement changed from 680 W pull-down resistor to 680
Measurement changed from 680 W pull-down resistor to 680
Ω pull-down
resistor.
January 2003
-008
Added 800 MHz system bus specifications. Added IMPSEL definition.
Updated Stop-Grant, HALT, and AutoHALT states
Updated Stop-Grant, HALT, and AutoHALT states
April 2003
-009
Added thermal and electrical specifications for 2.40C GHz, 2.60C GHz, and
2.80C GHz with 800 MHz system bus. Updated thermal specifications and
thermal monitor chapter. Updated PROCHOT# pin definition.
2.80C GHz with 800 MHz system bus. Updated thermal specifications and
thermal monitor chapter. Updated PROCHOT# pin definition.
May 2003
-010
Added thermal and electrical specifications for 3.20C GHz. Updated
processor markings.
processor markings.
June 2003
-011
Added Intel
®
Pentium
®
4 Processor Extreme Edition Supporting Hyper-
Threading Technology
November
2003
-012
Added 3.40 GHz thermal and electrical specifications for the Intel Pentium
4 Processor Extreme Edition and Intel Pentium 4 Processor with 512-KB L2
Cache on 0.13 Micron Process
4 Processor Extreme Edition and Intel Pentium 4 Processor with 512-KB L2
Cache on 0.13 Micron Process
February 2004