Linear Technology LT6200CS6-5#TRMPBF Linear IC LT6200CS6-5#TRMPBF Fiche De Données
Codes de produits
LT6200CS6-5#TRMPBF
LT6200/LT6200-5
LT6200-10/LT6201
10
62001ff
V
OS
Distribution, V
CM
= V
+
/2
INPUT OFFSET VOLTAGE (µV)
–1000
NUMBER OF UNITS
80
70
60
50
40
30
20
10
0
600
6200 G01
–600
–200
200
1000
V
S
= 5V, 0V
SO-8
INPUT OFFSET VOLTAGE (µV)
–1600–1200
NUMBER OF UNITS
40
60
1600
6200 G02
20
0
–800 –400 0
400 800 1200
80
30
50
10
70
V
S
= 5V, 0V
SO-8
INPUT OFFSET VOLTAGE (µV)
–1600–1200
NUMBER OF UNITS
40
60
1600
6200 G03
20
0
–800 –400 0
400 800 1200
80
30
50
10
70
V
S
= 5V, 0V
SO-8
V
OS
Distribution, V
CM
= V
+
V
OS
Distribution, V
CM
= V
–
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely. The LT6201 in the DD package is limited by power dissipation
to V
S
≤ 5V, 0V over the commercial temperature range only.
Note 4: The LT6200C/LT6200I and LT6201C/LT6201I are guaranteed functional
over the temperature range of –40°C and 85°C (LT6201DD excluded).
Note 5: The LT6200C/LT6201C are guaranteed to meet specified
Note 5: The LT6200C/LT6201C are guaranteed to meet specified
performance from 0°C to 70°C. The LT6200C/LT6201C are designed,
characterized and expected to meet specified performance from –40°C
to 85°C, but are not tested or QA sampled at these temperatures. The
LT6200I is guaranteed to meet specified performance from –40°C to 85°C.
Note 6: Minimum supply voltage is guaranteed by power supply rejection
Note 6: Minimum supply voltage is guaranteed by power supply rejection
ratio test.
Note 7: Output voltage swings are measured between the output and
Note 7: Output voltage swings are measured between the output and
power supply rails.
Note 8: This parameter is not 100% tested.
Note 9: Full-power bandwidth is calculated from the slew rate:
Note 9: Full-power bandwidth is calculated from the slew rate:
FPBW = SR/2πV
P
Note 10: Thermal resistance varies depending upon the amount of PC board
metal attached to the V– pin of the device.
θ
JA
is specified for a certain
amount of 2oz copper metal trace connecting to the V– pin as described in
the thermal resistance tables in the Application Information section.
Note 11: Matching parameters on the LT6201 are the difference between
Note 11: Matching parameters on the LT6201 are the difference between
the two amplifiers. CMRR and PSRR match are defined as follows: CMRR
and PSRR are measured in µV/V on the identical amplifiers. The difference
is calculated in µV/V. The result is converted to dB.
Note 12: There are reverse biased ESD diodes on all inputs and outputs, as
Note 12: There are reverse biased ESD diodes on all inputs and outputs, as
shown in Figure 1. If these pins are forced beyond either supply, unlimited
current will flow through these diodes. If the current is transient in nature
and limited to less than 30mA, no damage to the device will occur.
Supply Current vs Supply Voltage
Offset Voltage
vs Input Common Mode Voltage
Input Bias Current
vs Common Mode Voltage
TOTAL SUPPLY VOLTAGE (V)
0
SUPPLY CURRENT (mA)
20
25
30
6
10
6200 G04
15
10
2
4
8
12
14
5
0
T
A
= 125°C
T
A
= –55°C
T
A
= 25°C
INPUT COMMON MODE VOLTAGE (V)
0
–1.5
OFFSET VOLTAGE (mV)
–1.0
0
0.5
1.0
2
4
5
3.0
6200 G05
–0.5
1
3
1.5
2.0
2.5
V
S
= 5V, 0V
TYPICAL PART
T
A
= 125°C
T
A
= –55°C
T
A
= 25°C
COMMON MODE VOLTAGE (V)
–1
INPUT BIAS CURRENT (µA)
0
10
20
2
4
6200 G06
–10
–20
0
1
3
5
6
–30
–40
V
S
= 5V, 0V
T
A
= 125°C
T
A
= –55°C
T
A
= 25°C
elecTrical characTerisTics
Typical perForMance characTerisTics