Texas Instruments 1.5 Gbps Quad LVDS Buffer Evaluation Board DS15BR400EVK/NOPB DS15BR400EVK/NOPB Fiche De Données

Codes de produits
DS15BR400EVK/NOPB
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DS15BR400 Evaluation Board User Manual 
 
3
All LVDS inputs and outputs are accessible through SMA connectors and suitable for connections to 50-ohm 
instrumentation. The power can be applied using banana plugs.  The control pins, PWDN* and PEM pins, are 
connected to 2-position switches. 
 
Test Setup Procedure 
The following is a recommended test setup procedure for the device evaluation. Figure 2 depicts a typical setup 
and instrumentation used for the device evaluation. 
  
1.  Apply the power to the device (3.3V typical) between VDD and VSS banana plug receptacles, observe 
the value of I
CC, 
and compare it with the expected value (refer to the datasheet) to ensure that the device 
is functional. 
 
2.  Select I/O pairs you want to evaluate.  For example, let’s say that we want to evaluate the IN0 to OUT0 
signal path of the DS15BR400.  The setup instructions that follow are based on this selection. 
 
3.  Connect a signal source (i.e. signal generator or an LVDS driver) to the IN0 inputs on the board and 
adjust the signal parameters (VOH, VOL, VCM) so that they comply with the device input 
recommendations. 
 
4.  Enable the DS15BR400 by setting PWDN* to high on CON1.  Optionally, you may turn the pre-
emphasis on for this output by setting PEM to “H” position on CON2. 
 
5.  Connect the OUT0 outputs to an oscilloscope and view the output signals with an oscilloscope with the 
bandwidth of at least 3 GHz. 
 
OUT0+
OUT0-
SIGNAL
GENERATOR
OR
BERT TX
OSCILLOSCOPE
OR
SERIAL BERT RX
IN0+
IN0-
DS15BR400EVK
 
 
Figure 2. 
Typical Test Setup