Texas Instruments Evaluation Kit for OmniVision Image Sensor Applications with DS90UB901Q/DS90UB902Q FPD-Link III SERDES SERDESUB-16OVT/NOPB Fiche De Données
Codes de produits
SERDESUB-16OVT/NOPB
6
SERDESUB-16OVT EVM User’s Guide
SNLU108
–
July 2012
6. OPERATION
This section describes how to I2C instructions between Host and image sensor through
the DS90UB902Q and DS90UB901Q pair function in a camera system application.
Figure 4 shows the configuration of evaluation boards for I2C communication with a
Host controller. Note a Host controller requires an I2C interface with slave clock
stretching support.
In Camera mode, I2C transactions originate from the Master controller at the
Deserializer side (Figure 4). The I2C slave core in the Deserializer will detect if a
transaction is intended for the Serializer or the camera sensor (slave device) at the
Serializer. Commands are sent over the bidirectional control channel to initiate the
transactions. The Serializer will receive the command and generate an I2C transaction
on its local I2C bus. At the same time, the Serializer will capture the response on the
I2C bus and return the response on the high speed forward channel. The Deserializer
parses the response and passes the appropriate response onto the Deserializer I2C
bus.
Figure 4. Typical System Block Diagram
Operation