Texas Instruments Clock Jitter Cleaner With Cascaded PLLs and Integrated 1.5 GHz VCO (LVPECL LVDS LVCMOS Outputs) LMK040 LMK04031BEVAL/NOPB Fiche De Données
Codes de produits
LMK04031BEVAL/NOPB
18 SNAU045A
LMK040xx Evaluation Board User’s Guide
November 2013
Copyright © 2013, Texas Instruments Incorporated
www.ti.com
61.44 MHz VCXO PLL 2 Loop Filter
Phase Margin
74º
1600 uA
Loop Bandwidth
185 kHz
Fcomp
61.44 MHz
VCXO Frequency
61.44MHz
(From PLL1)
Output Frequency
1474.56 MHz
Supply Voltage
3.3 Volts
VCO Gain
10 MHz/Volt
Loop Filter
Components
C1 = 0
C2 = 12 nF
R2 = 1.8 k ohms
C3 = 50 pF
C4 = 10 pF
R3 = 0.6k ohms
R4 = 0.2k ohms
Note: PLL Loop Bandwidth is a function of K
, Kvco, N as well as loop components. Changing K
and N will change the
loop bandwidth.
Table 2. LMK040XX Eval Board and CodeLoader *.mac File Cross Reference
LMK040XX
Device
family
VCXO /
XTAL
VCXO/XTAL
Frequency
(MHz)
PLL1
Reference
clock
(MHz)
Configuration file (*.mac)
LMK040X1
VCXO
100
10
Std_LMK040X1_10MHZ_ref_100MHZ_VCXO.mac
LMK040X1
VCXO
61.44
122.88
Std_LMK040X1_122_88MHZ_ref_61_44MHZ_VCXO.mac
LMK040X1
Crystal 12.288
122.88
Std_LMK040X1_XTAL_1X_122_88MHZ_Ref.mac
LMK040X1
Crystal 12.288
122.88
Std_LMK040X1_XTAL_2X_122_88MHZ_Ref.mac
LMK040X3
VCXO
61.44
122.88
Std_LMK040X3_122_88MHZ_ref_61_44MHZ_VCXO.mac
Evaluation Board Notes
1. F
out
is AC-coupled. A 3 dB pad is installed between the F
out
pin and the SMA connector. The nominal output
level will be -1 dBm.
2. All clock outputs are AC-coupled.
3. All LVPECL/2VPECL clock outputs are terminated to GND with a 120 ohm resistor, one on each output pin
of the pair.
Evaluation Board Inputs/Outputs
The following table contains descriptions of the various inputs and outputs for the evaluation board.
Table 3. LMK040XX Evaluation Board I/O
Connector Name Input/Output Description
CLKout0 /
CLKout0*,
CLKout1 /
CLKout1*,
CLKout2 /
CLKout2*,
CLKout3 /
CLKout3*,
CLKout4 /
CLKout4*
Output
Differential clock output pairs. See Table 1 for format depending on part
number. If LVCMOS, each output can be independently configured
(non-inverted, inverted, tri-state, and LOW).
All clock outputs are AC-coupled.