Texas Instruments DAC3164 Evaluation Module DAC3164EVM DAC3164EVM Fiche De Données
Codes de produits
DAC3164EVM
Software Control
2.2.2
Digital Block Options
Figure 3. Digital Filtering Options
•
Clock Receiver Sleep: allows the DAC clock receiver to be in sleep mode. The DAC has minimum
power consumption in this mode.
power consumption in this mode.
•
Offset Adjustment: allows adjustment of DC offset to minimize the LO feed-through of the modulator
output. Writing the register for Offset B causes an autosync generation in the QMOFFSET block.
output. Writing the register for Offset B causes an autosync generation in the QMOFFSET block.
2.2.3
Output Control Options
Figure 4. Output Control Options
•
Output: allows the configuration of reference, output polarity, and output delay
•
DAC Gain: configures the full-scale DAC current and DAC3174 mode
4
DAC31x4 EVM User's Guide
SLAU466A – November 2012 – Revised June 2013
Copyright © 2012–2013, Texas Instruments Incorporated