Texas Instruments PCM5142 Evaluation Module PCM5142EVM-U PCM5142EVM-U Fiche De Données
Codes de produits
PCM5142EVM-U
BCK
t
BCH
t
BCL
t
BCY
t
DS
t
DH
t
BL
t
LB
DATA
LRCK
0. 5 * DVDD
0. 5 * DVDD
0. 5 * DVDD
(Input)
(Input)
(Input)
DATA
0. 5 * DVDD
( Output)
t
DOD
SLAS759A – AUGUST 2012 – REVISED SEPTEMBER 2012
PCM Audio Data Formats and Timing
The PCM514x supports industry-standard audio data formats, including standard I
2
S and left-justified. Data
formats are selected using the FMT (pin 16), Low for I
2
S, and High for Left-justified. All formats require binary 2s-
complement, MSB-first audio data; up to 32-bit audio data is accepted.
The PCM514x also supports right-justified and TDM in software control mode. I
2
S, LJ, RJ, and TDM are selected
using Register (Pg0Reg40). All formats require binary 2s complement, MSB-first audio data. Up to 32 bits are
accepted. Default setting is I
accepted. Default setting is I
2
S and 24 bit word length. The I
2
S slave timing is shown in
Figure 27. PCM514x Serial Audio Timing - Slave
Table 16. Audio Interface Slave Timing
Parameters
Min
Max
Units
t
BCY
BCK Pulse Cycle Time
40
ns
t
BCL
BCK Pulse Width LOW
16
ns
t
BCH
BCK Pulse Width HIGH
16
ns
t
BL
BCK Rising Edge to LRCK Edge
8
ns
t
BCK
BCK frequency at DVDD = 3.3V
24.576
MHz
t
BCK(1.8V)
BCK frequency at DVDD = 1.8V
12.288
MHz
t
LB
LRCK Edge to BCK Rising Edge
8
ns
t
DS
DATA Set Up Time
8
ns
t
DH
DATA Hold Time
8
ns
t
DOD
DATA delay time from BCK falling edge
15
ns
In software mode, the PCM514x can act as an I
2
S master, generating BCK and LRCK as outputs from the SCK
input.
Table 17. I
2
S Master Mode Registers
Register
Function
Page0, Register 9, D(0), D(4), and D(5)
I
2
S Master mode select
Register 32, D(6:0)
BCK divider and LRCK divider
Register 33, D(7:0)
36
Copyright © 2012, Texas Instruments Incorporated
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