Microchip Technology 24LC02BT-I/LT Memory IC SC-70-5 24LC02BT-I/LT Fiche De Données

Codes de produits
24LC02BT-I/LT
Page de 32
© 2009 Microchip Technology Inc.
DS21709J-page 5
24AA02/24LC02B
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
2.1
Serial Address/Data Input/Output 
(SDA)
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an open-
drain terminal, the SDA bus requires a pull-up resistor
to V
CC
 (typical 10 k
Ω for 100 kHz, 2 kΩ for 400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
2.2
Serial Clock (SCL)
The SCL input is used to synchronize the data transfer
to and from the device.
2.3
Write-Protect (WP)
The WP pin must be connected to either V
SS
 or V
CC
.
If tied to V
SS
, normal memory operation is enabled
(read/write the entire memory 
00-FF
).
If tied to V
CC
, write operations are inhibited. The entire
memory will be write-protected. Read operations are
not affected.
2.4
A0, A1, A2
These A0, A1 and A2 pins are not used by the 24XX02.
They may be left floating or tied to either V
SS
 or V
CC
.
Name
PDIP
SOIC
TSSOP
DFN
TDFN
MSOP
SOT23
SC-70
Description
A0
1
1
1
1
1
1
Not Connected
A1
2
2
2
2
2
2
Not Connected
A2
3
3
3
3
3
3
Not Connected
V
SS
4
4
4
4
4
4
2
2
Ground
SDA
5
5
5
5
5
5
3
3
Serial Address/Data I/O
SCL
6
6
6
6
6
6
1
1
Serial Clock
WP
7
7
7
7
7
7
5
5
Write-Protect Input
V
CC
8
8
8
8
8
8
4
4
+1.7V to 5.5V Power 
Supply